Questions about overshoot at the pin

[ushisna]

I need to know whether the following scenario will affect the my device :|

One input pin of the device receives a clock signal.The absolute maximum allowable overshoot at the pin was given as 5 V.The supply voltage is 4.3V .But while taking the signal quality capture a discrepancy is noticed.The observed value of overshoot is some 5.2V(200 mV extra then the absolute rating ) for a clock period of 4 ns. The one-third (1/3) of my clock pulse widt is around 12ns .

1. The measured overshoot voltage is 5.2 V for 4ns .The time period is less than 12ns(1/3 of clock width),so will the extra 0.2 V in the overshoot voltage can be allowed :?:

2. Will it damage my device :?:
3. Can we have voltages above the absolute values :?:

 

[FvM]

Overshoot

You should use a series termination at the clock source to remove the overshoot.

 

[ushisna]

Re: Overshoot

Thanks for the suggestion.
But this is found in the product which is under use.So we cant go for any external changes.In this case how can we predict the reliability of the device used on the board?
1.Will the device work with this scenario?If so how long will it work ?How to calculate its life ?:?:
2.Are there any guidelines regarding overshoot ?Most of the device datasheets does not have this parameter ,in that case how can we know the tolerance of the device to the overshoot?ANy idea? :idea:

 

[FvM]

Re: Overshoot

The question should be discussed more specificly. One important point is the type of input. Does it use a positive clamp diode? In this case, there is usually a maximum voltage rating as VCC + 0.3V. But actually, the voltage doesn't matter if the current is limited. The input current through a clamp diode gets dangerous, if either the diode itself can be damaged (effectively impossible with onboard generated short pulses) or a latchup can be triggered (with IC that are susceptible to it). Also unexpected behaviour may occur with some circuits, but most likely no damage.

Without a clamp diode, the absolute voltage limits of the used chip technology may be exceeded. Usually, this doesn't cause immediate failure, but slow degradation. As a matter of fact, VLSI circuits are using smaller structures but still wanted to be 5V or at least 3.3V tolerant. Some chip manufacturers are trying to stretch the limits and define sophisticated maximum input voltage rules, e. g. with duty cycles, that could be never found in past datasheets. As an example, see the Altera Cyclone III or Stratix III and IV datasheets. This rules should be taken seriously, to my opinion.

 

[ushisna]

Re: Overshoot

Thanks a lot for your response !!