questions about extract layout with calibre

[easyads]

Hi
I use calibre 2007 to extract layout. The layout is under tsmc 0.18um process.
But I found there is some problem. Assuming that there is a mimcap between A and B. After the extraction, the mimcap between A and B is extracted out. But also another pararistic capacitor whose value is about equal to the value of mimcap is extracted between A and B . So the capactior is about doubled for mimcap after extraction.
How can I solve this problem? Should I change the setup of calibre or change the version of value? Should I change the command file of extration?
Thanks

 

[erikl]

• recognition layer missing? Check your extraction rules!
• a possible error in the extraction rules? Check with the foundry. Usually they don't like a non-agreed change by a customer.
• If you are sure: the easiest remedy is to hack the extracted netlist. Keep that one which the LVS likes.