wanily1983
Member level 5
hi,guys
in prof.RAZAVI's book "design of analog cmos integrated circuit", he said that given the same bais current and size, NMOS has the smaller λ. in my opinion, if using N-well process, the doping profile of N-wel is larger than substrate. the
λ =(1/Leff)*(ΔXd/ΔVds), then when NMOS and PMOS has the same Leff, to the same ΔVds, the PMOS will have smaller ΔXd, then has smaller λ.
hope for your reply!
with regards
wanily
in prof.RAZAVI's book "design of analog cmos integrated circuit", he said that given the same bais current and size, NMOS has the smaller λ. in my opinion, if using N-well process, the doping profile of N-wel is larger than substrate. the
λ =(1/Leff)*(ΔXd/ΔVds), then when NMOS and PMOS has the same Leff, to the same ΔVds, the PMOS will have smaller ΔXd, then has smaller λ.
hope for your reply!
with regards
wanily