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what is clock shielding
In our system, system PLL generate CLK_24M for module ADC in RX. CLK_24M passes through module system PLL, RFPLL, TX and RX in turn and at last arrives at ADC. We want to use groud to do shielding for clock signal CLK_24M.
The question is which groud should we use to do shieding for CLK_24M? The ground of system PLL? Or allocate a seperate ground pad only for shielding CLK_24M? Or when CLK_24M passes throuth system PLL, use system PLL ground for shielding; when when CLK_24M passes throuth RFPLL, use RFPLL ground for shielding and etc?
my email is easyads@163.com
thanks
In our system, system PLL generate CLK_24M for module ADC in RX. CLK_24M passes through module system PLL, RFPLL, TX and RX in turn and at last arrives at ADC. We want to use groud to do shielding for clock signal CLK_24M.
The question is which groud should we use to do shieding for CLK_24M? The ground of system PLL? Or allocate a seperate ground pad only for shielding CLK_24M? Or when CLK_24M passes throuth system PLL, use system PLL ground for shielding; when when CLK_24M passes throuth RFPLL, use RFPLL ground for shielding and etc?
my email is easyads@163.com
thanks
