Question about APB bus?

[atuo]

Hi all,

The APB slave can't send Error siganl to the AHB master, and when some error (for example: write some read_only register ) occur, how the APB slave does with these error.

Thanks.

lsong

 

[rx300]

I think by the APB standard, the slave doens't have ACK signal going back to the master. In our designs, we always use a modified version of APB that supports ACK. For write to read-only register, the slave still returns an ACK. It's up to the APB master's software to determine if the write is successful or not -- write followed by read.

 

[tongson]

In this case, the slave should send the ACK to the MASTER.

 

[elektor]

Hi all,

In APB is no way send any response for AHB Master if you want to be compatibility with AMBA 2.0 specyfication.

In newest AMBA 3.0 AXI specyfication, APB protocol has response signal.

Regards

Elektor

 

[peen1]

you can always use additional lines to add features to the APB. We use GPIOs and other additional lines. The bus standard can always be tweaked to meat requirements. Afterall it is just a specification!!

 

[rx300]

In APB is no way send any response for AHB Master if you want to be compatibility with AMBA 2.0 specyfication.

Yes, the AMBA 2.0 was stupid. The ARM guys admitted that they made some mistakes. That's why they had to update the specification. Anyway, since we were designing our own chip instead of interfacing to somebody else's, we had the flexibility to make the bus work instead of sticking to a stupid specification.

 

[elektor]

[/quote]

Yes, the AMBA 2.0 was stupid. The ARM guys admitted that they made some mistakes. That's why they had to update the specification. Anyway, since we were designing our own chip instead of interfacing to somebody else's, we had the flexibility to make the bus work instead of sticking to a stupid specification.[/quote]




You are right unless, you have to certificate your IP according to AMBA Spec. Example with ACT Tool.

Elektor

 

[eeeraghu]

I have gone through the AXI interface, where did they actually mention the error response, please help

And one mor thing is that the AXI specs is an interface specification. Is it compatible to AHB? and where can i fine the AXI interconnect SPEC, they gave a primecell interconnect but we have nothing to do with that only the Spirit too gives an RTL when given some constrains.

please go through this

 

[wy21century]

arm was stupid, haha