mhytr
Member level 3
Question about adder
o=a+b
(1) a and b are all 32 bits
(2)a is 32 bits but b is 1 bit
I think condition 1 takes more resources,b.And i synthesize them in Synplicity(implemented by xilinx fpga) ,but the result is they take the same resources.
Why ?
Is it the same if they are implemented in ASIC?
Thanks
o=a+b
(1) a and b are all 32 bits
(2)a is 32 bits but b is 1 bit
I think condition 1 takes more resources,b.And i synthesize them in Synplicity(implemented by xilinx fpga) ,but the result is they take the same resources.
Why ?
Is it the same if they are implemented in ASIC?
Thanks