QuartusIIv3 Vs. QuartusIIv4

[gnomix]

Hi,
I have the following question about quartus:
Using the same source (and the same constrain) I found different timing performance using the qII.3 and QII.4.
In particular the compilation with the new version is worse respect the old version (about 10%).
Has someone found the same problem or I'm ill-fated ?
Regads
Gnomix

 

[davorin]

Seems they adjusted the timing specifications for their devices?
Rember this from 2.x to 3.0 in cyclone devices...

Isn´t there a release note telling what has actually changed?

 

[ydao]

surely, there are many difference between 3.0 and 4.0.
unfortunately, no abundant info provided to users.
for example, 3.0 use .csf and .esf to store settings,
and 4.0 version use only .qsf,....
in fact quartus' performance on consistency is so poor always, so your problem is not strange.

 

[ramesh]

QuartusII-V4.0 supports the Stratix-2 device (New device with 90nm technology) and improved timings and performance over QuartusII-V3.0

 

[leonqin]

More New version,More bad Performance!
for xilinx,altera,etc.

 

[henrik2000]

surely, there are many difference between 3.0 and 4.0.
unfortunately, no abundant info provided to users.
for example, 3.0 use .csf and .esf to store settings,
and 4.0 version use only .qsf,....
in fact qu@rtus' performance on consistency is so poor always, so your problem is not strange.

You are right! But remember that they are a 'Silicon vendor'.. Not a software company.. The worse is their software the more money they make! If your design does not fit in a specific device, you choose a larger one.. And they make more money !

Yhis is why I always try to synthesize with Leonardo spectrum and pass only the edf file to Altera, Xilinx or Actel !...

Cheers..

 

[ifarmer]

altera said QII4.0 will take more time to run a project, but the result has better timing performance.

You design should have more than one clock domain, u'd better set target clock frequency for each clock domain.

Anyway, QII is always a time-cosuming tools to run a design.

 

[davorin]

Just ran into problem synthesizing an older design original made in Quartus II v3.0...had to back-install Quartus II v3.0sp1 to successfully fit it into EP1C3...

After some weaking in v4.0sp1 it is possible as well...though seems main difference between those 2 version that for example the T80 IP core uses RAM bits in v3.0 whereas in v4.0 no RAM bits at all and therefore runs into "out-of LAB" problem...

Also needed to set "minimum state machine bits"...

Maybe some hidden "feature" in Quartus v4.0 if resource usage is close to 100% it automatically likes to upgrade to next bigger device? (o;

 

[henrik2000]

Davorin: Did you download and install service pack 1 for Quartus II ver 4 ?

I believe that they are aware of similar problems.. Reason of service pack 1. ("Better utilisation of the cyclone devices)..?

By the way which tool do you use to synthesize ? Or do you rely on Quartus for this phase ?

I always try at least with both synplicity and Leonardo to compare results. (For macros such as FIFO or RAM I just instanciate macros created with Quartus)..

Cheers

 

[davorin]

Both Quartus are SP1...with no external synthesizing/fitting tools.

I only tried once with Synplify...and those results were even worse area wise than with Quartus II v4.0sp1 (o;

Maybe I just keep both installatios...