Q: How fast are PLD's and FPGA's?

[wafer101]

Any expert advice please...
Ok let me ask you this. just for speed comparisson could it be possible to build an old intel 486 structure inside a PLD, would it be any faster, I just want to have a sense of the things you could do?

How many transistor is the fastest and biggest PLD made of? which is it? Altera xiling etc...

If I oght to use same ARM (I understand is just an IP core sold from this firm) in different devices would it performe the same?

shouldn't OpenARM be illegal? is it just the copy of ARM pirated or what?

A bit of answering for you, but I would apprechiate if you cold anwer a couple of this interesting Q (as for me that is....)
cheers
wafer101

 

[wafer101]

worst than me I guess....
maybe just don't want to answer this silly Q. or even worst no one knows what am talking about..

Thanks anyway

 

[mobile-it]

I think the 486 as a chip will be faster than a 486 as softcore in CPLD/FPGA

I don't think the opencores of chips are illigal... it is a contribution from some people to the world of chip design... (see https://www.opencores.org for more cores like USB core, openrisc, AC9,...)

 

[throwaway18]

shouldn't OpenARM be illegal? is it just the copy of ARM pirated or what?

Link for openARM please?
I'v searched, I can't find a processor core project called openARM.

 

[wafer101]

please read the Q.

I am just asking WHAT can you do with PLDs/FPGA, in another word what is the power of this devices (hypotetical comparisson with an old 486) How much they cost (worst to fastest)

I don't know if there is openARM.

for any expert I guess this is a simple Q. hhaaaa is this devices reprogrammable

I hope I am not just wasting time here!!!


wafer101

 

[GrandAlf]

Generally speaking the hardware processor would be faster than any PLD etc implementations. By how much depents on chip complexity and how much they are optomised for a particular purpose. No real hard and fast rules on this one. One point to bear in mind is that a hardware design can be optomised for propagation delay between components. Very difficult to copy this with just universal gate arrays.