Problem with errors in a package (Xilinx XST)

[kakarala]

error in a package

HI i wrote the following package and i am checking this for errors. This gave me the following errors.

ERROR:HDLParsers:808 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. + can not have such operands in this context.
ERROR:HDLParsers:808 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. + can not have such operands in this context.
ERROR:HDLParsers:808 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. + can not have such operands in this context.
ERROR:HDLParsers:808 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. + can not have such operands in this context.
ERROR:HDLParsers:3324 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. IN mode Formal SIZE of conv_std_logic_vector with no default value must be associated with an actual value.
ERROR:HDLParsers:3324 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. IN mode Formal SIZE of conv_std_logic_vector with no default value must be associated with an actual value.
ERROR:HDLParsers:3324 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. IN mode Formal SIZE of conv_std_logic_vector with no default value must be associated with an actual value.
ERROR:HDLParsers:3324 - "C:/Downloads/Motionestimation/SAD.vhd" Line 41. IN mode Formal SIZE of conv_std_logic_vector with no default value must be associated with an actual value.





library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.images.all;

package sad is

impure function sumof_ad(curr_blk_row,curr_blk_column,ref_blk_row,ref_blk_column : integer) return integer;
end sad;

package body sad is
impure function sumof_ad (curr_blk_row,curr_blk_column,ref_blk_row,ref_blk_column : integer ) return integer is
-- variable temp: integer;
-- variable sum : integer:=0;
variable a0,a1,a2,a3 : integer;
variable tmp : std_logic_vector(13 downto 0) := "00000000000000";
begin
for i in 0 to 3 loop
for j in 0 to 3 loop

tmp := tmp + conv_std_logic_vector(abs(curr_image(currblk_row+i,currblk_column+j)- ref_image(refblk_row+i,refblk_column+j)),14);
end loop;
end loop;
return(conv_integer(tmp));
end sumof_ad;
end sad;

---------- Post added at 08:17 PM ---------- Previous post was at 07:43 PM ----------

i think i used wrong variable name after i changed the variable name it gives me the following error.


INTERNAL_ERROR:Xst:cmain.c:3464:1.56 - Process will terminate. For technical support on this issue, please open a WebCase with this project attached at Xilinx: Support.

Process "Synthesize - XST" failed

 

[TrickyDicky]

Re: error in a package

The fact you have made the function impure concerns me. You shouldnt really be accessing variables that dont exist locally inside the function.

Also, you are trying to add together 16 values from the same memory in the same clock cycle. This is not going to work.

 

[kakarala]

Re: error in a package

hii
how can i add all the 16 values in the function. I cant use process in the function right?I am writing a function because I am writing the code to compute motion vectors using search technique and i need to compute SAD of all the surrounding blocks and check which one has min SAD . I am calling this function from another vhdl code. can you suggest any other way?

 

[permute]

Re: error in a package

See your previous thread on this same project. You were pretty close, though you did have some logic errors. It seems you've decided that using an impure function might trick the tools into making the design fit.

I suggest learning about simulations, and then making a step-by-step project. eg:
* read 1 pixel per cycle from each image. start with reading just 0-3.
* read 1 pixel per cycle, but read the first 4x4 block.
* add an x offset.
* add a y offset.
* add logic to find the absolute value of each pixel.
* add logic to accumulate this value. Note that you will need logic like:
if (first valid pixel condition) then acc <= this_pixel; elsif (other valid pixel condition) acc <= acc + this_pixel; end if;

 

[TrickyDicky]

Re: error in a package

Pipeline the memory reads and find the min SAD over a number of clock cycles. Functions are really just a way of hiding a lot of code.

 

[kakarala]

Re: error in a package

actually i am able to write the code to compute sad as in my previous thread , but i am not able to use it in my code for motion estimation because i cannot instantiate a component in process. In my code i need to compute the SAD of 4 blocks and compute min SAD. Can we use a component in a process.

 

[permute]

Re: error in a package

That's not really what those constructs are for.

Think about it this way: everything is there to describe hardware.
components define hardware.
processes define hardware.

You connect signals between components (and processes). Some will connect to the top level ports. Using a component inside a process would make no sense. It would make sense to use a component inside a "generate statement". Of course it doens't make any sense to place a generate inside a process either.

 

[FvM]

Re: error in a package

It seems to me, that all methods you tried to process 2-D image data in HDL have turned out unsuitable. It's not a matter of detail syntax errors or using wrong HDL constructs rather than lack of basic understanding, how these problems can be performed by programmable logic. The VHDL syntax problems arise, because you are wanting the language to do things that the underlying hardware can't do.

Apparently you don't get the sense of various detail suggestions, that have been made in this or the previous thread. I'm not sure, if they are showing a way, or if it would be better to start with basic literature on image processing with FPGA?

 

[kakarala]

Re: error in a package

hi can you tell me where can i find information about basic literature on image processing?

 

[TrickyDicky]

Re: error in a package

Not just Image processing, a basic understanding of digital electronics would be a good start.

This appears to have a nice interactive tutorial:
**broken link removed**

 

[FvM]

Re: error in a package

Unfortunately I don't know a book about this application field. I imagine, that there would be a book that discusses the specific aspects of 2-D object manipulations and their implementation in VHDL, like Meyer-Baese Digital Signal Processing with FPGA does it for the DSP field. From the general VHDL books I have seen, I like e.g. Enoch O. Hwang Digital Logic and Microprocessor Design With VHDL. But there so many VHDL books that it's hard to keep track of things.