sanjaysharmaiitk
Member level 1
How to connect reset pin to all flip-flops in gate level netlist that is generated after synthesis through Design-Compiler(synopsys tool).
{as like clock, reset pin must be connected to each flipflops to reset output} .
(NOTE: undefined states of flips are creating problem during post synthesis simulation to get right results.)
{as like clock, reset pin must be connected to each flipflops to reset output} .
(NOTE: undefined states of flips are creating problem during post synthesis simulation to get right results.)