problem about spi implementation on fpga

[sowmya_jagadish]

hello sir/madam

i have some questions. please reply me to my mail id. nandini.nagendra17@gmail.com

1) In SPI there is no acknowledgement service but it is there in I2C. so if i design spi to work(trasmission and reception ) including acknowledgement. will it be recognized as a different work ?

2) i want to establish communication between blackfin ADSP and FPGA via SPI. suppose spi in fpga includes acknowledgement service .Now the question is on blackfin side for transmission and reception of data, how to make processor to send or receive acknowledgement signals? can v make these things on processor side? and make both to communicate including acknowledgement service?

3) Even though FPGA has built in SPI port, what is the need of designing and implementing SPI using HDL language on FPGA again?

please answer me, i am in very much need of the answers. please help me , i beg u.

thanks in advance

regards,
sowmya

 

[permute]

1.) probably not.
2.) you can use a protocol. either signaling busy, ack, nack, etc... It makes sense to do this on a byte boundary, and avoid acking every byte (see sd cards as an example).
3.) does the FPGA have a built in SPI port?

 

[TrickyDicky]

1. SPI is just a physical layer interface. How you packetise the data is up to you.
3. No FPGA (that I know of anyway) has a "built in" SPI port. It may be that there is a connection to an SPI port on another device on your dev board. You will have to create your own SPI controller or download one from somewhere to get it to work.

 

[xtcx]

hello sir/madam

i have some questions. please reply me to my mail id. nandini.nagendra17@gmail.com

1) In SPI there is no acknowledgement service but it is there in I2C. so if i design spi to work(trasmission and reception ) including acknowledgement. will it be recognized as a different work ?

2) i want to establish communication between blackfin ADSP and FPGA via SPI. suppose spi in fpga includes acknowledgement service .Now the question is on blackfin side for transmission and reception of data, how to make processor to send or receive acknowledgement signals? can v make these things on processor side? and make both to communicate including acknowledgement service?

3) Even though FPGA has built in SPI port, what is the need of designing and implementing SPI using HDL language on FPGA again?

please answer me, i am in very much need of the answers. please help me , i beg u.

thanks in advance

regards,
sowmya

1) Yes, you can implement it if DSP is ready to take up more load (Usually it is not recommended). We've done such projects. But DSP has to be written with more application level protocols. In FPGA it is just few resources to implement however. Basically, this will be a different work, as Tricky said, SPI is just a PHY and the with basic protocol for IO flow. however you can customize it as per your needs. You can use ACK\NACK\REQ\RESP kind of functions too...But remember it will add more load on DSP....and may ruin other critical tasks of DSP

2)You can make the DSP to do anything, but all it needs is a bit of Coding and more CPU cycles, not ofcourse money or piece of cake

3) FPGA does not have built-in SPI. Maybe you can use an ready-made IP core for SPI which is widely available.....I hope you mean this..

Let us know more in case of any protocol implementation in SPI.

 

[lucbra]

I think OP refers to the SPI memory (for configuration) as the SPI interface.

Strongly disencouraged to used this interface to communicate with your DSP - you will need to implement this interface yourself.