Power factor correction

[cts_casemod]

I need to develop a high power boost converter. I would typically do this fully power factor corrected, because of all the reasons we know.

There are no current regulated PFC controllers out there for 2KW of power. They are all voltage regulated to keep a constant DC_Link Voltage rather than a DC_link Current. Single stage flyback/buck LED drivers are one exception and they even have dimming features but given the low power they all operate in CRM or DCM, which would be unsuitable for the power levels I need.

Lets suppose than rather that changing the current to follow the mains voltage, we would set a current mode controller to draw a fixed value. Say for example, to draw 10A all over the duration of the sine wave. Of course during the zero crossings the input would be zero, but otherwise 10A.

This would remove the discontinuities typical rectifier capacitor circuits have and reduce the current peaks in a very similar way to any other PFC circuit. in terms of installation, well its 10A, so no crazy current peaks.

Power input would also vary with voltage. 10V*10A = 100W or 100V*10A = 1000W, etc

So why is it that I never seen this scheme being implemented? Surely in a commercial approach it would Fail THD, but other than that I see no drawbacks. It would simplify my design considerably, reduce unwanted component stresses (defined current level) and would be easier to process by a micro controller.

I'd be curious to hear your thoughts.

 

[FvM]

I don't see any PFC features implemented with your design idea. PFC requires sinusoidal input current, proportional to input voltage.

 

[cts_casemod]

I don't see any PFC features implemented with your design idea. PFC requires sinusoidal input current, proportional to input voltage.

Its not PFC corrected per si, but it has a near unity displacement factor, which gives me (the consumer) the same advantages as a PFC corrected power supply in practical terms.

 

[treez]

FvM you are correct obviously, but cts_casemod's idea does give a better power factor than eg a mains rectifier followed by big smoothing capacitor, as you know.
Somebody was doing what cts_casemod is talking about recently on this forum...i will find it and link it in here.

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this might be something like OP described...
https://www.edaboard.com/threads/352524/

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i think what OP wants is a constant off time controller, with simply the peak current set to 10A.

 

[FvM]

Reduction of reactive current has no advantage for the customer "in practical terms", except for industry and big commercial electricity rate payers that are charged for "consumed" reactive energy.

If you can design a boost converter that achieves constant input current, it won't be a big thing to make the current proportional to rectified mains voltage, make a true PFC converter.

 

[treez]

The PFC algorithm is difficult to program into a micro because of the secrecy that surrounds programming of micros.
But as you know, the PFC algorithm it self isn’t that hard...
You have your feedback voltage (divided down), and thus your error voltage, which is how far away from the demanded value the actual value is.

You apply a moving average function to that error voltage over time, and then multiply that moving average by a gain value, and then square the value, and then feed this value into a multiplier, which actually multiplies the processed error voltage by the rectified line voltage (with another gain value being multiplied to that first), and then you use the output of that multiplier to set the peak current in the sense resistor….the actual sense resistor voltage is fed into an amplifier (so in software that’s another moving average and a gain function to multiply it by)….the multiplier actually feeds into the other input of the current amplifier. The output of the current amplifier then goes into the pwm comparator, which outputs the duty cycle.
However, that is not all, there is an artifical ramp also fed into the pwm comparator, like a kind of slope compensation.
There is also another algorithm that kind of modifies the whole transfer function near the zero crossings so as to stoposcillations.

…actually yes, considering the above, considering programming it, I can quite see why cts_casemod wants to use the method described….though as you know you could cheat and use an analog chip

 

[cts_casemod]

I dont think we're quite talking about the same thing.

A 2KW rectifier/capacitor power supply will pull in excess of 30A during the narrow time it charges the capacitors, so in effect the amount of power I could draw from a household socket would have to be reduced to account for the poor displacement factor. This is not quite reactive energy it is simply poor use of the conductors since power is pulled in short bursts.

(a)

A Power factor corrected unit would draw 9A. Note how the peaks are smaller, since current is drawn during a larger period

(b)

My unit would draw about the same
(c)

So in practical terms I see no advantage in having the current following the voltage, if my current is in phase with the voltage and the displacement factor is good i get no advantage from (b) to (c). I do get from either (c) or (b) into (a).

 

[treez]

Cts_casemod I know what you mean…you are getting a better power factor than a rectifier/capacitor with your “10A method” (for want of a better descriptive word).

And I am sure you appreciate that your “10A method” does not have as good a power factor as one gets with a 99% power factor corrected active boost power factor stage.

What I think is, that if some dirty great big LC filter is placed upstream to your “10A method”, then you will actually end up with a 99% power factor…..and though that means using a big LC filter, it is not as big as they would need to be to smooth out the whole shebang that wasn’t using your “10A method”...so if combined with a fairly big LC filter, your method would give a great power factor, from a simple system (just a bit bigger).

 

[cts_casemod]

And I am sure you appreciate that your “10A method” does not have as good a power factor as one gets with a 99% power factor corrected active boost power factor stage.

I understand what you say, But lets define PF.

Am I creating reactive power? No. All the power I use is real power, therefore KW=KVA. There is no de-rating required on the installation.
Am I creating a phase shift between voltage and current? No. They are in phase (angle wise)
Am I creating harmonics? Well we would have to do an FFT to find that one, although there is no sudden change of current, so I dont see this being an issue (I stand to be corrected here)

So what is exactly that I get by using the 99% power factor corrected active boost stage in virtue of my active boost stage?

I'm just looking to find a good reason to use one above the other, but I cant find one.

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The PFC algorithm is difficult to program into a micro because of the secrecy that surrounds programming of micros.
But as you know, the PFC algorithm it self isn’t that hard...
You have your feedback voltage (divided down), and thus your error voltage, which is how far away from the demanded value the actual value is.

You apply a moving average function to that error voltage over time, and then multiply that moving average by a gain value, and then square the value, and then feed this value into a multiplier, which actually multiplies the processed error voltage by the rectified line voltage (with another gain value being multiplied to that first), and then you use the output of that multiplier to set the peak current in the sense resistor….the actual sense resistor voltage is fed into an amplifier (so in software that’s another moving average and a gain function to multiply it by)….the multiplier actually feeds into the other input of the current amplifier. The output of the current amplifier then goes into the pwm comparator, which outputs the duty cycle.
However, that is not all, there is an artifical ramp also fed into the pwm comparator, like a kind of slope compensation.
There is also another algorithm that kind of modifies the whole transfer function near the zero crossings so as to stoposcillations.

…actually yes, considering the above, considering programming it, I can quite see why cts_casemod wants to use the method described….though as you know you could cheat and use an analog chip

Actually its not quite that.

Typical PFC converters are voltage controlled. They have a slow current loop to avoid harmonic distortion.

My implementation is a single stage battery charger, with constant input current as to protect both the converter and the installation. If the mains suddenly decreases to 110V instead of 220V I keep pulling 10A. I can also control and predict when the inductor operates in CCM, CRM or DCM, so as to calculate a suitable line filter.

With a micro controller it is important to understand that I need to feed an analog signal to a hardware reference to trigger the mosfet at a given current.

Typically this is done by sampling the input voltage and outputting the same sine wave multiplied by an error signal ranging from 0 (minimum current) to 1 (maximum current).

If my sine table has 64 entries resolution and my output DAC or PWM is 10 bit then I have 16 steps (1024/64) to regulate the output current. At 2KW and 440VDC, that's approximately 4.5A or a step size of 280mA. Using a DC level instead, current can be adjusted in any of the 1024 steps.

 

[Warpspeed]

Reduction of reactive current has no advantage for the customer "in practical terms",

And there in lies the problem.
The only real reason to use PFC at all is to comply with some law or regulation.
And if you must seek compliance, you need to go the Full Monty PFC.
So its really all or nothing.
A half way PFC is a waste of time, unless it offers some worthwhile secondary advantage.

If you need a full PFC to drive high quality constant current source, the input current must fall to zero at the zero crossings, which requires energy storage to feed the constant load current.

Only real solution is a conventional PFC boost circuit, which enables more efficient energy storage at a high voltage, followed by a CCM buck converter run in current mode. A simple hysteric buck converter would be ideal for that.

 

[cts_casemod]

And there in lies the problem.
The only real reason to use PFC at all is to comply with some law or regulation.

Is it? So how do I pull 3kW from a 13A socket with a power factor < 1?

And if you must seek compliance, you need to go the Full Monty PFC.
So its really all or nothing.
A half way PFC is a waste of time, unless it offers some worthwhile secondary advantage.

I would have thought being able to draw rated power without melting my sockets (or somebody else's for that matter) would be an advantage.
Then again you haven't clarified what my half way PFC does less than the nice commercial versions. I opened the topic to figure that out. I showed the waveforms and I'm looking for someone to actually shown me why method (c) is inferior to method (b) on post #7.

If you need a full PFC to drive high quality constant current source, the input current must fall to zero at the zero crossings, which requires energy storage to feed the constant load current.
Only real solution is a conventional PFC boost circuit, which enables more efficient energy storage at a high voltage, followed by a CCM buck converter run in current mode. A simple hysteric buck converter would be ideal for that.

I need the supply to behave as controlled current source to limit peak current. The fact that the output will have a 100% ripple doesn't bother my batteries too much. In fact that's any single stage LED driver works. There is an output capacitor to smooth, but the light has ripple. Same principle here.

Two stage approach is ideal, but the additional size and efficiency penalty are not work it.

 

[Warpspeed]

I just cannot believe that an approved wall socket is going to totally melt into a molten blob just because the power factor is a bit less than unity.

In your original post you never mentioned battery charging, only that you needed a constant output current.

Your ideas seem perfectly reasonable, but as others have already pointed out what is suggested is not really proper PFC, more power factor improvement, which is not a bad thing.

 

[cts_casemod]

I just cannot believe that an approved wall socket is going to totally melt into a molten blob just because the power factor is a bit less than unity.

I've tried it in the past, for anything above 1.5KW it does melt. These things are on continuously drawing rated power for over 4 hours, much unlike any other appliance that may draw full load for 15 minutes and then off for some more time, averaging a lower input over time.

In your original post you never mentioned battery charging, only that you needed a constant output current.

Yep, I could have described better.

Your ideas seem perfectly reasonable, but as others have already pointed out what is suggested is not really proper PFC, more power factor improvement, which is not a bad thing.

I have no issues in implementing proper PFC, so to speak, the problem is that PFC nowadays is used as dark term to define anything that results in less than ideal network utilization or pollution (harmonics for example). Even literature seems to contradict itself sometimes.

Ill probably just implement it as is. If anything I only have to change the control section.

I'm thinking perhaps implementing a sort of digital PFC as some high end drivers do. Basically its synchronized on the zero crossings and relies on a digital implementation rather than reading the input voltage. The advantage is that THD caused by voltage fluctuations or switching is completely removed and I dont rely on errors caused by the ADC input.

 

[FvM]

A power supply with square current waveform has a power factor of 0.81. Means the 10A constant current device (Irms = 10A) can supply 8.1*230V = 1.86 kW while a PF 0.99 device supplies 2.28 kW with the same RMS input current.

Your "melted sockets" problem isn't understandable without knowing the actual current waveforms of the tested devices. One possible problem is that a badly filtered PFC switcher can draw a considerable amount of pwm frequent current.

The sine current in post #7 has some displacement by the way (cos φ = 0.93 or so).

 

[treez]

Then again you haven't clarified what my half way PFC does less than the nice commercial versions. I opened the topic to figure that out. I showed the waveforms and I'm looking for someone to actually shown me why method (c) is inferior to method (b) on post #7.

well, as you know, method (c) definetely has a poorer power factor than method (b)...you can tell by just looking at the waveforms.....method (c) is flat topped, not sinusoidal, so it obviously has higher harmonics on it than the fundamental 50Hz.
I am sure you appreciate that power factor consists of a displacement factor and a distortion factor. They get multiplied together. An ideal power factor of unity is only achieved when there are no harmonics, and the current is exactly in phase with the voltage.
However, as you know, your method (b) has a lot better power factor than method (a).

Typical PFC converters are voltage controlled.

I agree, the one that I described would be, the first error voltage I referred to was the error voltage relating to the output voltage.

Typical PFC converters are voltage controlled. They have a slow current loop to avoid harmonic distortion.

I agree again, as page 7 of the following describes in relation to current amplifier…
http://cds.linear.com/docs/en/datasheet/1248fd.pdf
..the current loop is slow , but as you know, its not as slow as the voltage loop in most standard PFCs….the current loop needs to be fast enough to get the drawn current getting into phase with the line voltage.

 

[FvM]

Usual PFC power supplies are voltage controlled because they are designed for constant voltage output. It's no problem to design a power supply with constant sine input current (supplemented by overvoltage shutdown in case the load is disconnected).

 

[cts_casemod]

well, as you know, method (c) definetely has a poorer power factor than method (b)...you can tell by just looking at the waveforms.....method (c) is flat topped, not sinusoidal, so it obviously has higher harmonics on it than the fundamental 50Hz.
I am sure you appreciate that power factor consists of a displacement factor and a distortion factor. They get multiplied together. An ideal power factor of unity is only achieved when there are no harmonics, and the current is exactly in phase with the voltage.
However, as you know, your method (b) has a lot better power factor than method (a).


I agree, the one that I described would be, the first error voltage I referred to was the error voltage relating to the output voltage.

Good description. But what I want is to quantify how much worse Ill be. Say a comparison with that achieved by a passive PF circuit.

I agree again, as page 7 of the following describes in relation to current amplifier…
http://cds.linear.com/docs/en/datasheet/1248fd.pdf
..the current loop is slow , but as you know, its not as slow as the voltage loop in most standard PFCs….the current loop needs to be fast enough to get the drawn current getting into phase with the line voltage.

Current on a PFC has two loops. Instantaneous is fast enough to follow the input voltage waveform. Average has a 20-30Hz bandwidth so as not to cause harmonic distortion and it is regulated based on the DC_LINK voltage.

 

[treez]

Current on a PFC has two loops. Instantaneous is fast enough to follow the input voltage waveform. Average has a 20-30Hz bandwidth so as not to cause harmonic distortion and it is regulated based on the DC_LINK voltage.

There is only two loops for current if you also put in an instantaneous overcurrent shutdown, as exists on the LT1248 controller. The main current loop has an intermediate speed loop, which allows it to be quick enough to follow the rectified mains half sines….the speed of the main current loop is described on page 7 of the attached (post#15) lt1248 datasheet….
It is the “voltage loop” that has a 20-30hz bandwidth…..at least on a voltage output regulated active pfc stage it is.
Or are you doing a current output regulated PFC stage? I am not sure?

 

[cts_casemod]

There is only two loops for current if you also put in an instantaneous overcurrent shutdown, as exists on the LT1248 controller. The main current loop has an intermediate speed loop, which allows it to be quick enough to follow the rectified mains half sines….the speed of the main current loop is described on page 7 of the attached (post#15) lt1248 datasheet….
It is the “voltage loop” that has a 20-30hz bandwidth…..at least on a voltage output regulated active pfc stage it is.
Or are you doing a current output regulated PFC stage? I am not sure?

Correct. The output current is shaped to the input voltage after being multiplied by the slow voltage loop that has a 20-30Hz bandwith.
As a result, while the instantaneous current change is kept in phase with the voltage, the average value of the input current (1A, 2A, 10A) changes slowly.

I'm doing constant power output PFC. It should draw full power whenever the output voltage is below a certain value (say 440VDC). Once it reaches 440VDC it should reduce the average value of the input current.

Most commercial PFC solutions set the multiplier wrongly when the output voltage is lower than what it should be. They simply keep increasing the multiplier and the converter draws power in excess of its rating. When this happens the cycle by cycle current limit over-rides the PFC current loop and creates distortion to the final waveform.