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Power consumption value of NAND2 gate.

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praneshcn

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For a 90nm library,

wat is the approximate power consumption value of an NAND2, inverter, buffer and DFF.
how do we calculate the value manually.
 

Depends upon the process (generic, low power, etc) as well as the cell library (speed or power optimised) and drive strength and PVT. But typical figures for a 2-input NAND, could be:

A pin: 2nW/MHz
B pin: 2.4nW/MHz

To calculate the values manually, I'd recommend running a SPICE sim, if you don't how power characterised libraries.
 

Hi,

It depends on the switching activity and drive strength of the cell.

Thanks..

HAK..
 

For theoritical aspects, It has been clearly described in

CMOS Digital Integrated Circuits: Analysis and Design
S-M. Kang and Y. Leblebici
3rd edition

Digital Integrated Circuits: A Design Perspective
J. Rabaey, A. Chandrakasan, and B. Nikolic
2nd edition
 

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