Atre
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sta fanout
Hello,
I have a problem concerning STA on a design after synthesis.
In DC, I set ideal_network on reset pin.
In PrimeTime it seems I can not do that and it reports lots of transition violations.
How can I tell to PrimeTime that reset net is ideal.
Generally speaking, how can I do STA on post-synthesis design, using the constraints from DC???
Hope someone can help!
Best regards,
Atre.
Hello,
I have a problem concerning STA on a design after synthesis.
In DC, I set ideal_network on reset pin.
In PrimeTime it seems I can not do that and it reports lots of transition violations.
How can I tell to PrimeTime that reset net is ideal.
Generally speaking, how can I do STA on post-synthesis design, using the constraints from DC???
Hope someone can help!
Best regards,
Atre.