PMOS DIFTL INPT AND SUBSTRATE NOISE

[Aravind_tucson]

It is mentioned in Razavi design of AIC book pg 663 that by using PMOS differential inputs the effect of substrate noise can be reduced? I did not understand how it could achieve this more than an NMOS input could?

 

[Grig]

Hi
PMOS is implemented in NWELL
So the backgates separated from substarate via lossy capacitance

 

[Aravind_tucson]

Thank u for ur reply grig. But the noisy digital PMOS transistors would be sharing the same n-well with the analog PMOS TXRS right?. Noise could be coupled in through the common n-well?

 

[Grig]

Yes
But nwell has less resistance than psub and nwell tie is more effective to collect unwanted currentt