sadfish
Junior Member level 3
jitter pll
what's the different and relation ship between the jitter and phase noise?
IN pll design, what is the main source of jitter or phase noise. the noise of device(MOSFET , R), the fluntuation of the power&gnd ?
Another problem is how to simulate the jitter of PLL in hspice?
How can I measure the jitter in the output of hspice simulation result? when I simulate a PLL in hspice, I want to know the long time jitter and maxim cycle to cycle jitter, what should I do?
How can I analysis the spectrum of the jitter in hspice?
what's the different and relation ship between the jitter and phase noise?
IN pll design, what is the main source of jitter or phase noise. the noise of device(MOSFET , R), the fluntuation of the power&gnd ?
Another problem is how to simulate the jitter of PLL in hspice?
How can I measure the jitter in the output of hspice simulation result? when I simulate a PLL in hspice, I want to know the long time jitter and maxim cycle to cycle jitter, what should I do?
How can I analysis the spectrum of the jitter in hspice?