Please help with constant VF motor driver

[DELTA67]

Hi all,
I have successfully simulated this VFD driver:

GitHub - carneeki/OpenVFD: Variable Frequency Drive for ATmega328 based Arduinos

Variable Frequency Drive for ATmega328 based Arduinos - GitHub - carneeki/OpenVFD: Variable Frequency Drive for ATmega328 based Arduinos

github.com

How to add constant VF option please if the motor is rated 230V, 50Hz?
I know that I need to scale the values in the lookup table, but how?
Another question, if I change the PWM carrier frequency from 31kHz to 8kHz, Have I to use another lookup table? How to generate it?
Many thanks in advance.

 

[FvM]

Need to scale pgm_read_byte_near() output values

OCR2A = pgm_read_byte_near(sin256 + (uint8_t)(icnt + A_OFFSET));
OCR1A = pgm_read_byte_near(sin256 + (uint8_t)(icnt + B_OFFSET));
OCR1B = pgm_read_byte_near(sin256 + (uint8_t)(icnt + C_OFFSET));

 

[DELTA67]

Thanks FvM
How I do the scaling?
V/F = 230/50 = 4.6
I devide the (freq* values) by 4.6 for example ?

 

[BradtheRad]

Your lookup table has values where each is a pulse length. Each is based on the sine of the point in a cycle which you're calculating.

example , at 45 degrees the sine is .707. Hence the pulse length at 45 deg is .707 times whatever is the pulse length at 90 degrees.

 

[DELTA67]

Thanks BradtheRad, I know how the lookup table works, I need the formula to scale it in order to get a constant VF.

 

[FvM]

I suggest
scaled table value = actual frequency/50 Hz*original table value

As table uses straight binary representation (centered at 128), you need additional math to keep the center value during scale operation.

 

[KlausST]

Hi,

Scaling:
The table is made for nominal frequency. Let's say 50Hz.
The table values represent the PWM_duty_cycles.

So if you want to drop the frequency to 30% you also need to drop the duty_cycles to 30%. In simplest way.
The drawback of this simple method is that you get low motor torque at low frequencies.
To compensate for this one usually increases the voltage a little bit at low frequencies.
Let's say at 30% of frequency you use 32% of voltage (duty_cycle)

*****
More detail on table values:

(There are various ways to control the power bridge, how to generate the sine, what voltage offset (DC w.r.t. to DC_bus_GND) to chose, even motor wiring. I don't know these informations for your application. Thus I can give only general informations and you may need to adjust it to your application)
Amplitude:
Let's say your DC bus voltage is 350V.
And you want to generate 230V RMS, then the peak of the sine is at about 325V. So the peak duty_cycle is 350V/325V = 93%
(Avoid to use 100% duty cycle because of bootstrap problems in your power bridge)

frequency:
If you have 23kHz carrier and want to generate 50Hz, then you need to use 23000Hz/50Hz = 460 PWM pulses for one full wave.
Accordingly you need 160 PWM pulses if the carrier is 8kHz.
Now it depends on how your software works ... it may store full, half or a quarter of the full wave. Maybe any other value.
--> you need to understand your software, how it generates a full wave as well how it generates different frequencies.

Klaus

 

[DELTA67]

Thanks Klaus, it's a bit more clear for me now. Can you give me a formula please?
As I said the motor is rated 230V RMS, 50Hz, and the DC = 400V.
In fact I've not done any practical test yet, I'm using simulation only. I've put an RC low pass filter to view the generated sine waves.
The methode used in the project is the DDS and the lookup table contains 256 values. The PWM carrier freq= 31kHz.

 

[DELTA67]

I suggest
scaled table value = actual frequency/50 Hz*original table value

As table uses straight binary representation (centered at 128), you need additional math to keep the center value during scale operation.

Thanks FvM.
You mean:

scaled table value = (actual frequency/50 Hz)*original table value

How to keep the centre value?

 

[KlausST]

Can you give me a formula please?

Did you notice that I wrote:
"it depends..", "let´s say", "if", "there are various ways", "I don´t know" ....

Klaus

 

[DELTA67]

Did you notice that I wrote:
"it depends..", "let´s say", "if", "there are various ways", "I don´t know" ....

Klaus

All the details are on the project's page on github (link given in the 1st post).
What do you need to know please?

 

[KlausST]

Hi,

Sorry, I can´t go through the whole project to find out how it is meant to work. Hardware, firmware, voltages...
Don´t get me wrong. It´s your project, thus in first place it´s you who has to understand how it is meant to work.

Hopefully you will find someone who is able to spend that time for you.

Klaus

 

[DELTA67]

I'm sorry Klaus, I appologize for abusing your precious time!
The project on github is only one source code file for arduino uno , No hardware.
My questions are, I think, general and independent of that project:
1- How to scale a given lookup table (LUT) to get a constant VF?
2- If I change the PWM carrier frequency, can I keep the same LUT?

 

[KlausST]

Hi,

sorry I did not make it clear:

My questions are, I think, general and independent of that project:

Your questions may be general and independent, but not the answers.
I thought I already wrote that in post #7 and highlighted it in post #10.

I gave general answers in post #7

1) is in post #7, I even gave an example.
2) is also in post#7, also with an example.


Klaus

 

[DELTA67]

frequency:
If you have 23kHz carrier and want to generate 50Hz, then you need to use 23000Hz/50Hz = 460 PWM pulses for one full wave.
Accordingly you need 160 PWM pulses if the carrier is 8kHz.

Using DDS method you can generate any frequency less than half PWM freq without changing the LUT length.

 

[FvM]

How to keep the centre value?

One possibility
Have int8 (or whatever your resolution is) signed table, get actual value, multiply with VF factor, shift to center by adding 0x80.

 

[KlausST]

Using DDS method you can generate any frequency less than half PWM freq without changing the LUT length.

Yes. DDS method.
But a different method does it a different way. Thus I wrote: It depends.

I wrote:

frequency:
If you have 23kHz carrier and want to generate 50Hz, then you need to use 23000Hz/50Hz = 460 PWM pulses for one full wave.
Accordingly you need 160 PWM pulses if the carrier is 8kHz.

This exactly is what the DDS software does for you.
It has to create 160 PWM pulses for 8kHz PWM frequency and 460 PWM pulses for 23kHz PWM frequency (per full wave).
But if you change the PWM frequency you need to adjust the DDS software to get the correct output (duty cycles, motor frequency...)

Note that I gave a general answer. I did not write you need to modify your table. Which may be necessary when you don´t use the DDS method.

Klaus

 

[DELTA67]

Thanks KvM and KlausST for your help.
In fact I don't know for which frequency the LUT is generated. The guy on github don't provide this info.
I need frequencies from 0 to 100Hz.
Do some one knows a practical VFD project in the web?

 

[BradtheRad]

I need frequencies from 0 to 100Hz.
Do some one knows a practical VFD project in the web?

Even after you solve your present question about creating look-up values, there are several challenges to completing a VFD project.
Example, to drive high voltage components from low power devices.

Example, to filter SPWM pulses at the final stage as dependent on load and frequency. It may be necessary for you to test different LC values (in the 2nd-order low-pass filter) in order discover what circumstances require which values (and/or L:C ratio).

Pulse lengths need to be changed according to load and frequency. There might not be the magic L & C value which is suitable for all your loads & all frequencies. Chances are you'll need to switch in different LC combinations.

This versatllity is hard to achieve. Once achieved, it ought to have safeguards added. Projects like a variable frequency drive aren't readily found in many places.

As I was experimenting with my own simulation I could see the helpfulness of generating identical sine waves over a wide range of frequencies. This is a quasi-digital method which needs only one IC. It needs a small capacitor filter. It generates wasted power and heat in an H-bridge.

 

[FvM]

In fact I don't know for which frequency the LUT is generated. The guy on github don't provide this info.

As you mentioned above, the code implements DDS method and isn't restricted to a specific output frequency. The LUT generates 100 % modulation as you easily see. A VFD however can't run with constant V/F above rated motor frequency without either using a higher input respectively DC link voltage or rewiring the motor from wye to delta (if not already delta wired).

In addition, it needs to implement overmodulation (superimpose 3 * f common mode component) to even achieve nominal voltage above 0.87 * rated frequency. As far as I see, the design misses overmodulation feature.