chaminda12001
Newbie level 5
Hi ,
I am getting error message when I go to debugging dspic33ch128mp508 curiorsity development board. I inculded the configuration settings at the begining of the programme. error message :
Is there settings I need to check
I am getting error message when I go to debugging dspic33ch128mp508 curiorsity development board. I inculded the configuration settings at the begining of the programme. error message :
"Target Device Not Ready For Debugging Check Config Bits PGC, PGD Settings".
Is there settings I need to check
Code C - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 // FSEC #pragma config BWRP = OFF // Boot Segment Write-Protect bit (Boot Segment may be written) #pragma config BSS = DISABLED // Boot Segment Code-Protect Level bits (No Protection (other than BWRP)) #pragma config BSEN = OFF // Boot Segment Control bit (No Boot Segment) #pragma config GWRP = OFF // General Segment Write-Protect bit (General Segment may be written) #pragma config GSS = DISABLED // General Segment Code-Protect Level bits (No Protection (other than GWRP)) #pragma config CWRP = OFF // Configuration Segment Write-Protect bit (Configuration Segment may be written) #pragma config CSS = DISABLED // Configuration Segment Code-Protect Level bits (No Protection (other than CWRP)) #pragma config AIVTDIS = OFF // Alternate Interrupt Vector Table bit (Disabled AIVT) // FBSLIM #pragma config BSLIM = 0x1FFF // Boot Segment Flash Page Address Limit bits (Enter Hexadecimal value) // FOSCSEL #pragma config FNOSC = FRC // Oscillator Source Selection (Internal Fast RC (FRC) Oscillator with postscaler) #pragma config IESO = ON // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source) // FOSC #pragma config POSCMD = NONE // Primary Oscillator Mode Select bits (Primary Oscillator disabled) #pragma config OSCIOFNC = OFF // OSC2 Pin Function bit (OSC2 is clock output) #pragma config FCKSM = CSECMD // Clock Switching Mode bits (Clock switching is enabled,Fail-safe Clock Monitor is disabled) #pragma config PLLKEN = PLLKEN_ON // PLLKEN (PLLKEN_ON) #pragma config XTCFG = G3 // XT Config (24-32 MHz crystals) #pragma config XTBST = ENABLE // XT Boost (Boost the kick-start) // FWDT #pragma config RWDTPS = PS1048576 // Run Mode Watchdog Timer Post Scaler select bits (1:1048576) #pragma config RCLKSEL = LPRC // Watchdog Timer Clock Select bits (Always use LPRC) #pragma config WINDIS = OFF // Watchdog Timer Window Enable bit (Watchdog Timer operates in Window mode) #pragma config WDTWIN = WIN25 // Watchdog Timer Window Select bits (WDT Window is 25% of WDT period) #pragma config SWDTPS = PS1048576 // Sleep Mode Watchdog Timer Post Scaler select bits (1:1048576) #pragma config FWDTEN = ON_SW // Watchdog Timer Enable bit (WDT enabled in hardware) // FICD #pragma config ICS = PGD3 // ICD Communication Channel Select bits (Communicate on PGC1 and PGD1) #pragma config JTAGEN = OFF // JTAG Enable bit (JTAG is disabled) // FDMT #pragma config DMTDIS = OFF // Dead Man Timer Disable bit (Dead Man Timer is Disabled and can be enabled by software) // FS1OSCSEL #pragma config S1FNOSC = FRC // Oscillator Source Selection (Internal Fast RC (FRC) Oscillator with postscaler) #pragma config S1IESO = ON // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source) // FS1OSC #pragma config S1OSCIOFNC = OFF // Slave OSC2 Pin Function bit (OSC2 is clock output) #pragma config S1FCKSM = CSDCMD // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are disabled) #pragma config S1PLLKEN = S1PLLKEN_ON // S1PLLKEN (S1PLLKEN_ON) // FS1WDT #pragma config S1RWDTPS = PS1048576 // Run Mode Watchdog Timer Post Scaler select bits (1:1048576) #pragma config S1RCLKSEL = LPRC // Watchdog Timer Clock Select bits (Always use LPRC) #pragma config S1WINDIS = ON // Watchdog Timer Window Enable bit (Watchdog Timer operates in Non-Window mode) #pragma config S1WDTWIN = WIN25 // Watchdog Timer Window Select bits (WDT Window is 25% of WDT period) #pragma config S1SWDTPS = PS1048576 // Sleep Mode Watchdog Timer Post Scaler select bits (1:1048576) #pragma config S1FWDTEN = ON_SW // Watchdog Timer Enable bit (WDT enabled in hardware) // FS1ICD #pragma config S1ICS = PGD3 // ICD Communication Channel Select bits (Communicate on PGC1 and PGD1) #pragma config S1ISOLAT = ON // Isolate the Slave core subsystem from the master subsystem during Debug (The slave can operate (in debug mode) even if the SLVEN bit in the MSI is zero.) #pragma config S1NOBTSWP = OFF // BOOTSWP Instruction Enable/Disable bit (BOOTSWP instruction is disabled)
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