Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

phase noise and frequency multiplication

Status
Not open for further replies.

svensl

Full Member level 1
Joined
Mar 25, 2005
Messages
99
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
2,202
I often read that " Phase noise performance is degraded by frequency multiplication at the rate of 20 log (N) whereas N being the multiplication factor".

Could someone please share their insight as to where this "20 log (N)" term comes about? Some literature references would be nice.

Thanks.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top