911pcb
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PCB stackup is an essential component of printed circuit board design. It plays a critical role in determining the performance and functionality of electronic devices. It involves configuring PCB layers and selecting appropriate materials to ensure the seamless operation of the circuit board.
In today’s fast-paced electronics industry, a solid grasp of PCB stackup is essential. Design engineers and PCB designers require a profound comprehension of PCB stackup in the context of modern electronics. This need arises from the demands for speed, precision, and reliability.
Three factors in the PCB design process impact bare board fabrication: controlled impedance, crosstalk, and interplane capacitance. Fabricators can control a stackup’s impedance but cannot consider the other two.
Engineers and PCB designers are primarily responsible for the stackup because they understand the necessary requirements and control methods. 911EDA explains how to set PCB stackups properly for the board to function properly.
In PCB layout, impedance is the result of the combined inductance and capacitor of a circuit at high frequencies. Some electronic components are so fast they can cause harmful reflections, causing issues in other nearby traces. Designers and engineers use controlled impedance when they need a signal to have a specific impedance for proper operation.
To prevent reflections, the circuit must send signals at high speeds on paths that have a predetermined impedance. To prevent reflections, high-speed tracks on PCBs require controlled impedances. Fabricators can control the thickness of substrates to achieve the desired impedance.
Several factors within its stackup structure influence the impedance of a PCB. These factors encompass copper trace dimensions on both layers and the spacing between copper features. Additionally, they include core and pre-preg material properties, as well as the thickness of surrounding materials. Together, these elements collectively shape the PCB’s impedance characteristics.
Crosstalk is the unwanted electromagnetism coupling between traces. The coupling between traces can result in one trace’s signal pulses overpowering the signal from the other. This can occur even when the traces are not physically touching.
It can occur when there is tight spacing between parallel traces on a PCB. For electromagnetic purposes, manufacturing may need to increase the minimum distance between parallel traces.
When two PCB traces run alongside each other, a high-speed signal on one can affect the quality of the other. Designers can prevent this interference by using a suitable PCB stackup. They can achieve this by increasing the distance between the traces when they are on the same surface. Or, they can add a ground/power plane between them when they are adjacent.
The distance between the two is typically less than three mils. Fabricators are able to get the impedance of a stackup correct, but they cannot account for two other factors. The PCB designer is responsible because they understand the design rules and how to apply them.
Substrate materials primarily consist of three components: resin, copper, and glass. Designers combine these components to fulfill specific electronic requirements. In PCB design, using differential pairs for high-speed signal transmission is crucial. Signal strength loss can negatively impact signal quality.
Misalignment or skew of these differential pairs can have adverse effects on signal quality, potentially leading to signal attenuation. Signal attenuation results in signal distortion or even loss. Using lossy laminate materials and pre-pregs can sometimes cause signal degradation.
To address these challenges and ensure optimal signal integrity, it is essential to select laminates for PCB stackups carefully. The choice of laminates should prioritize minimizing signal attenuation. When picking materials for making devices, it’s important to consider the dissipation factor (DF). The dissipation factor measures how fast energy is lost.
Foil lamination is a popular method for manufacturing multilayer PCBs, and it includes carefully considering the surface finish. This aspect is crucial for solderability and for protecting the copper layers from oxidation. During the foil lamination process, manufacturers must pay careful attention to the areas of exposed copper. These areas are critical for establishing reliable electrical connections and ensuring the PCB’s proper functionality.
Three main components make up a typical six-layer PCB. These components are copper foil, pre-preg (fiberglass cloth with resin coating), and laminates. The outer layers feature solid copper sheets. In designing these layers, engineers ensure components electrically connect across the board by aiding signal tracing and current flow.
Pre-preg is the dielectric material between layers. Its selection depends on factors like thickness, layer structure, impedance, and various resin content options.
Laminates, made from the same resin/glass as pre-preg, feature bonded copper foil layers. These laminates undergo curing during the press bonding process. Fabricators etch two laminate layers simultaneously, including the inner signal path and plane layers.
Designers typically create PCB stackups with pairs of layers, often with even numbers. They carefully plan the placement of drill holes for interlayer connections. These holes are crucial for the board’s structural integrity and electrical functionality.
These stackups can also include multiple lamination cycles and the use of blind and buried vias. The manufacturing process chosen by the fabricator affects the overall cost of the board.
Etching is a vital process used to remove excess conducting material, such as copper, from between the traces on a PCB. This can significantly impact the board’s impedance and overall performance.
Fabricators usually use an etch resistance on all remaining copper circuits and remove it with an etching solution. This solution also makes the copper etch sideways, making the trace wider at the bottom than at the top. Thicker copper layers introduce more error in this process, so thinner copper layers provide better impedance control.
For inner signal layers, fabricators commonly prefer to use 1/2-ounce copper layers to optimize the PCB’s performance.
Etching transforms unwanted copper into signal traces and eliminates it during their creation. Adhering to tolerances is crucial because of the thicker copper layer in the outer layers. Controlled impedance finds application solely in inner layer signal routing.
The resin in the pre-preg melts during lamination, filling the gaps between adjacent copper layers. This process ensures uniform thickness and insulation on each side of the board. While laminating the materials together, the pressure squeezes the excess pre-preg from the board edges, thinning the layers.
The distance between the trace and the nearest plane is critical for controlling impedance accuracy. Designers match the signal layers to the plane layers in a laminate. Lamination is used between two layers to ensure separation accuracy.
The dielectric constant, often referred to as Dk, is a critical factor in a laminate system. It indicates how well a PCB material can hold electrical energy, measuring its capacity to store an electrical charge. The dielectric constant affects the PCB assembly, including solder masking, which protects parts of the board during soldering.
High temperatures can have a significant impact on PCB materials. This includes the potential for solder masking to degrade or become less effective.
This property is crucial in deciding the performance of electronic devices. It impacts the speed and quality of electrical signals traveling through the PCB. Additionally, the dielectric constant directly influences parasitic capacitance, affecting the transmission line impedance of a copper trace, copper plane, and laminate.
Notably, the dielectric constant and impedance share an inverse relationship. A higher dielectric constant leads to an increase in parasitic capacitance. So, it’s essential to fully grasp the different laminate choices for designing PCB stackups with controlled impedance.
Fabricators typically select laminate types readily available in their region, with FR-4 being the most common choice. FR-4 is an abbreviation for glass-reinforced epoxy resin laminates. FR-4 is recognized for its flame-retardant properties (hence “FR”). Its strong mechanical and electrical characteristics make it a preferred choice.
Moreover, when manufacturers incorporate additives, FR-4 exhibits excellent thermal dissipation, enhancing its stability, reliability, and power capabilities. However, industry-provided datasheets for laminates typically adhere to IPC standards. These datasheets offer electrical details, including the typical dielectric constant and loss tangent measured at 1MHz.
These values, though, vary with frequency and the glass-to-resin ratio. To calculate impedance at frequencies around 2 GHz, fabricators rely on information provided by laminate manufacturers.
PCB designers must determine the number of layers for signal and power distribution. They also need to arrange them properly within the PCB stackup to meet signal integrity and power delivery requirements. The PCB designer must keep the power and ground planes close to ensure proper interplane capacitance. Balancing the routing of signals and the interplane capacitor in a multilayer board may require compromise.
A stackup with only one closely spaced plane pair is suitable for routing purposes. However, it may not be sufficient for power delivery if interplane capacitance is required. Two sets of plane pairs can provide interplane capacitance, but they reduce routing space.
Utilizing a fully copper layer in PCBs with two signal layers and controlled impedance presents challenges. This is because the copper layer can alter the impedance between adjacent layers.
Original article.
In today’s fast-paced electronics industry, a solid grasp of PCB stackup is essential. Design engineers and PCB designers require a profound comprehension of PCB stackup in the context of modern electronics. This need arises from the demands for speed, precision, and reliability.
Three factors in the PCB design process impact bare board fabrication: controlled impedance, crosstalk, and interplane capacitance. Fabricators can control a stackup’s impedance but cannot consider the other two.
Engineers and PCB designers are primarily responsible for the stackup because they understand the necessary requirements and control methods. 911EDA explains how to set PCB stackups properly for the board to function properly.
The Importance of PCB Layer Configuration
Controlled Impedance
In PCB layout, impedance is the result of the combined inductance and capacitor of a circuit at high frequencies. Some electronic components are so fast they can cause harmful reflections, causing issues in other nearby traces. Designers and engineers use controlled impedance when they need a signal to have a specific impedance for proper operation.
To prevent reflections, the circuit must send signals at high speeds on paths that have a predetermined impedance. To prevent reflections, high-speed tracks on PCBs require controlled impedances. Fabricators can control the thickness of substrates to achieve the desired impedance.
Several factors within its stackup structure influence the impedance of a PCB. These factors encompass copper trace dimensions on both layers and the spacing between copper features. Additionally, they include core and pre-preg material properties, as well as the thickness of surrounding materials. Together, these elements collectively shape the PCB’s impedance characteristics.
Crosstalk
Crosstalk is the unwanted electromagnetism coupling between traces. The coupling between traces can result in one trace’s signal pulses overpowering the signal from the other. This can occur even when the traces are not physically touching.
It can occur when there is tight spacing between parallel traces on a PCB. For electromagnetic purposes, manufacturing may need to increase the minimum distance between parallel traces.
When two PCB traces run alongside each other, a high-speed signal on one can affect the quality of the other. Designers can prevent this interference by using a suitable PCB stackup. They can achieve this by increasing the distance between the traces when they are on the same surface. Or, they can add a ground/power plane between them when they are adjacent.
Interplane Capacitance
When signal speeds exceed 100MHz, the lack of capacitance can lead to non-compliance with EMI regulations. Adding discrete capacitors with high inductance doesn’t resolve this issue. Designers can establish interplane capacitance by positioning power and ground planes closely together.The distance between the two is typically less than three mils. Fabricators are able to get the impedance of a stackup correct, but they cannot account for two other factors. The PCB designer is responsible because they understand the design rules and how to apply them.
PCB Stackup and Materials
Substrate materials primarily consist of three components: resin, copper, and glass. Designers combine these components to fulfill specific electronic requirements. In PCB design, using differential pairs for high-speed signal transmission is crucial. Signal strength loss can negatively impact signal quality.
Misalignment or skew of these differential pairs can have adverse effects on signal quality, potentially leading to signal attenuation. Signal attenuation results in signal distortion or even loss. Using lossy laminate materials and pre-pregs can sometimes cause signal degradation.
To address these challenges and ensure optimal signal integrity, it is essential to select laminates for PCB stackups carefully. The choice of laminates should prioritize minimizing signal attenuation. When picking materials for making devices, it’s important to consider the dissipation factor (DF). The dissipation factor measures how fast energy is lost.
The Role of PCB Stackup in Fabrication
Understanding PCB fabrication is essential for design engineers. It involves turning a PCB design into a physical bare board based on specified design package criteria.Foil lamination is a popular method for manufacturing multilayer PCBs, and it includes carefully considering the surface finish. This aspect is crucial for solderability and for protecting the copper layers from oxidation. During the foil lamination process, manufacturers must pay careful attention to the areas of exposed copper. These areas are critical for establishing reliable electrical connections and ensuring the PCB’s proper functionality.
Three main components make up a typical six-layer PCB. These components are copper foil, pre-preg (fiberglass cloth with resin coating), and laminates. The outer layers feature solid copper sheets. In designing these layers, engineers ensure components electrically connect across the board by aiding signal tracing and current flow.
Pre-preg is the dielectric material between layers. Its selection depends on factors like thickness, layer structure, impedance, and various resin content options.
Laminates, made from the same resin/glass as pre-preg, feature bonded copper foil layers. These laminates undergo curing during the press bonding process. Fabricators etch two laminate layers simultaneously, including the inner signal path and plane layers.
Designers typically create PCB stackups with pairs of layers, often with even numbers. They carefully plan the placement of drill holes for interlayer connections. These holes are crucial for the board’s structural integrity and electrical functionality.
These stackups can also include multiple lamination cycles and the use of blind and buried vias. The manufacturing process chosen by the fabricator affects the overall cost of the board.
Process Flow
When manufacturing a PCB with multiple layers, achieving tight impedance control is one of the most important considerations. Fabricators can achieve this control by etching and plating traces of the correct width on the outer layers. They also etch the traces in the inner layers and maintain a specific thickness during lamination.
Etching is a vital process used to remove excess conducting material, such as copper, from between the traces on a PCB. This can significantly impact the board’s impedance and overall performance.
Fabricators usually use an etch resistance on all remaining copper circuits and remove it with an etching solution. This solution also makes the copper etch sideways, making the trace wider at the bottom than at the top. Thicker copper layers introduce more error in this process, so thinner copper layers provide better impedance control.
For inner signal layers, fabricators commonly prefer to use 1/2-ounce copper layers to optimize the PCB’s performance.
Etching transforms unwanted copper into signal traces and eliminates it during their creation. Adhering to tolerances is crucial because of the thicker copper layer in the outer layers. Controlled impedance finds application solely in inner layer signal routing.
The resin in the pre-preg melts during lamination, filling the gaps between adjacent copper layers. This process ensures uniform thickness and insulation on each side of the board. While laminating the materials together, the pressure squeezes the excess pre-preg from the board edges, thinning the layers.
The distance between the trace and the nearest plane is critical for controlling impedance accuracy. Designers match the signal layers to the plane layers in a laminate. Lamination is used between two layers to ensure separation accuracy.
Dielectric Constant
The dielectric constant, often referred to as Dk, is a critical factor in a laminate system. It indicates how well a PCB material can hold electrical energy, measuring its capacity to store an electrical charge. The dielectric constant affects the PCB assembly, including solder masking, which protects parts of the board during soldering.
High temperatures can have a significant impact on PCB materials. This includes the potential for solder masking to degrade or become less effective.
This property is crucial in deciding the performance of electronic devices. It impacts the speed and quality of electrical signals traveling through the PCB. Additionally, the dielectric constant directly influences parasitic capacitance, affecting the transmission line impedance of a copper trace, copper plane, and laminate.
Notably, the dielectric constant and impedance share an inverse relationship. A higher dielectric constant leads to an increase in parasitic capacitance. So, it’s essential to fully grasp the different laminate choices for designing PCB stackups with controlled impedance.
Laminate Types
Fabricators typically select laminate types readily available in their region, with FR-4 being the most common choice. FR-4 is an abbreviation for glass-reinforced epoxy resin laminates. FR-4 is recognized for its flame-retardant properties (hence “FR”). Its strong mechanical and electrical characteristics make it a preferred choice.
Moreover, when manufacturers incorporate additives, FR-4 exhibits excellent thermal dissipation, enhancing its stability, reliability, and power capabilities. However, industry-provided datasheets for laminates typically adhere to IPC standards. These datasheets offer electrical details, including the typical dielectric constant and loss tangent measured at 1MHz.
These values, though, vary with frequency and the glass-to-resin ratio. To calculate impedance at frequencies around 2 GHz, fabricators rely on information provided by laminate manufacturers.
Arranging the Layers in a PCB Stackup
PCB designers must determine the number of layers for signal and power distribution. They also need to arrange them properly within the PCB stackup to meet signal integrity and power delivery requirements. The PCB designer must keep the power and ground planes close to ensure proper interplane capacitance. Balancing the routing of signals and the interplane capacitor in a multilayer board may require compromise.
A stackup with only one closely spaced plane pair is suitable for routing purposes. However, it may not be sufficient for power delivery if interplane capacitance is required. Two sets of plane pairs can provide interplane capacitance, but they reduce routing space.
Utilizing a fully copper layer in PCBs with two signal layers and controlled impedance presents challenges. This is because the copper layer can alter the impedance between adjacent layers.
Original article.
