Mirzaaur
Member level 2
Dear All,
I need advice about using tri-state (TBUF) compnent in FPGA design.
question:-
if output of tri-state is connected to input of a register then what will be the logic value stored in register while tri-state is in high impedance state?
best regards,
mirza
I need advice about using tri-state (TBUF) compnent in FPGA design.
question:-
if output of tri-state is connected to input of a register then what will be the logic value stored in register while tri-state is in high impedance state?
best regards,
mirza