OpAmp simulation using Virtuoso

[Spliter]

I tried to simulate 2 stage OpAmp example form Allan&Holdberg pg 276-278, example 6.3-1. There was used L=1u, i used 180n (that is technology I use) and kept all W/L ratios, Cc, Vdd=2.5, Vss=-2.5 etc. But when I make a test circuit (buffer, or non inverting amp) I do not get expected results. Buffer gives constantly Vdd at Out (saturation), and in non-inverting topology instead twice amplified input sine (amp=1.5V) (R1=R2=1k) i got distorted sine with x100mV amplitude.
I checked all conections, redraw schematic it bugs all the time (or I do?!). Any idea?

 

[erikl]

Scaling down an opAmp by just keeping the original W/L ratios usually doesn't work -- threshold voltages differ.
You'll have to resize the bias currents/voltages -- and the W/L ratios, presumably -- in order to shift the amp into a reasonable operating point.

 

[findsriharsha]

run a DC-op and find whether all your transistors are in saturation...

 

[Braski]

you should first test your op amp as a single block.

use this config: put a very high resistor (say tens of MOHMS) between out and inverting input and a very high capacitance (say 1 mF or more) from the invering input and ground. on the non inverting input put your DC bias and AC signal.
the schematic is on Baker and also on Allen i think.

In this way, at DC you have a right operating point, and at AC you have open loop gain. Note that you should check if the MOS work properly inside the op amp.

Then, if you use a too low resistor in your feedback path, maybe the opamp cannot drive it properly, because tipically the output resistance of the opamp is not so low, without a buffer. Then, the gain falls down and the virtual short circuit fails. Check it.