No decaps for a DC sensing application

[nkp6195]

Dear All,

I am working on a reliability test chip and need to stress devices way higher than normal. The chip is all about stressing devices and sensing voltages. The nominal domain (consisting of shift register, etc) has a good amount of decaps but I am considering not to add any decaps to the stress domain (esp. since testing has to be carried out at high temperatures where unnecessary stress on decap oxide will be incurred leading to not only leakage but TDDB).

Do you suggest not adding decaps on chip can cause any problems ? I plan to add decaps externally on pcb.

Thanks in anticipation.

 

[dick_freebird]

If it's truly DC then you may forget about decoupling.
But that wants some checking. Circuits like ring oscs
need on chip decoupling to ensure they run at the right
frequency (and benefit from resistor limited output too).

You may have oxides that are more rugged than the
devices under test (e.g. use the I/O MOS to decouple
core MOS). Or MIM caps maybe, if available. Even MMMMM
caps might be worth doing, especially on test chips
where you're more pad limited than explicit circuit area
limited. Get your pattern density by crafting capacitors.