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need help regarding interfacing ADC 0808 with XILINX spartan 3E FPGA

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longbeach2

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Hello guys,
I am trying to interface ADC 0808 with spartan 3E FPGA.can anyone please tell me how to do verilog program of this?.ADC 0808 works at 450 KHz and fpga 50 Mhz.Do i have to use different ADC or i can do it with 0808.
please help.
thank you for your time and help
 

how do we divide the clock frequency ?? it would be better if you give me a link with the verilog code in it.... plz do help as soon as possible.... its urgent.
You can you ADC0808, however you have to divide 50Mhz clock down to something which 0808 can handle.
 

You may use external clocks if the option is available.
 

use a clk divider as follow:

Code Verilog - [expand]
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reg     [10:0] clk_divider=0;
    wire        fs;
    assign       fs = clk_divider[4]; //    fs = GlobalClk/5
 
    always @(posedge GlobalClk)
        clk_divider<=clk_divider+1;

 
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