Need guidance on VLSI design

[npsangale]

Dear All,
I am new to VLSI field.
And I want to design and simulate LDO regulator in ADS.
But I dont know how to calculate the W and L.
Also what exactly mean for nm technology.. for example what is meaning of 65nm technology.
Also how to calculate the W and L for different technology.

Can any body please guide me?

 

[ads-ee]

well it used to be based on gate length/minimum feature size, but that has changed over the years as the nodes kept shrinking.

Here is a short article on this stuff.

 

[sandeep_sggs]

I think following book could be a good starting point for almost all of your questions in VLSI..
"Cmos: Circuit Design, Layout, and Simulation (IEEE Press Series on Microelectronic Systems) by R. Jacob Baker (Author)"

 

[npsangale]

Thank you very much all.
Surely I will go through the links..
Thanks a lot