NanoRoute (SoC Encounter) problem

[diamantd]

hello guys,

I have successfully done the following steps :

floorplan ,
power rings/stripes insertion,
placemenet,
CTS,
(several timing analysis in any step and optimization when it is needed)

So when i am going to routing with Nanoroute i get the following error:

#ERROR (NRDB-328) found a cut layer "contact" whose down layer "overlap" is not a masterslice or routing layer. In the LEF file, remove the cut layer or define a masterslice or routing layer before the cut layer.

...but it doesn't help me identify in witch lef (i have lef for cells and memories) there is the problem and in witch specific cell... I couldn't find something similar on the web (except some sites in chinese with no response on the problem!!).

Has anyone seen that before??? I am familiar with SoC encounter toolflow and i've done the process several times. It's the first time i am getting such an error..

Thanks :wink:

 

[randyest]

Sounds like the problem is with the technology section of the LEF, sometimes called TOP LEF. It's the part at the beginning (maybe in a separate file if you don't merge all lefs into one) that defines the metal routing layers, vias, etc. Not a particular cell model. If you post your TOP LEF I can help debug the problem.

 

[diamantd]

thanks randyest for the reply,

you are right, the problem was to my header lef file. My library has a header.lef file and a lef file for the cells.

From what I understand from the error message i changed the 1st layer (was LAYER OVERLAP) to a masterslice. I show the change:

(some previous text.....)


#------------------------------------------
# declaration of resolution
UNITS
    DATABASE MICRONS 1000  ;
END UNITS
MANUFACTURINGGRID 0.01 ;
#------------------------------------------

#------------------------------------------
# declaration of overlap
LAYER overlap
    TYPE MASTERSLICE ;	#it was OVERLAP, problem for Nanoroute 
END overlap
#------------------------------------------

#------------------------------------------
# declaration of non-routing layer
LAYER contact
    TYPE CUT ;
END contact
#------------------------------------------

#------------------------------------------
# declaration of routing layer
LAYER metal1
    TYPE ROUTING ;
    WIDTH 0.240 ;
    SPACING 0.240 ;
    SPACING 0.280 RANGE 10 1000 ;
    PITCH 0.5600 ;
    OFFSET 0.28 ;
    MAXWIDTH 20 ;
    AREA 0.1764 ;
    DIRECTION HORIZONTAL ;
    CAPACITANCE CPERSQDIST 0.000661423 ;
    RESISTANCE RPERSQ 0.0770000000 ;
    THICKNESS 0.48 ;
END metal1

(following text.....)

With this change it seems that Nanoroute completes the global and detail routing succesfully. But it is a correct change in the lef file. I made that change after reading the LEF/DEF manual that cadence provides. I read this :

You must define layers in process order from bottom to top. For example:
poly masterslice
cut01 cut
metal1 routing
cut12 cut
metal2 routing
cut23 cut
metal3 routing

Am i right?? Is something I misunderstood and the change was wrong??

Thanks

 

[randyest]

Check with your ASIC vendor / fab to be sure. If it works it maybe OK, but it's not how my top.lef looks. I have:

LAYER NDIFF
 TYPE MASTERSLICE ;
END NDIFF

LAYER PDIFF
 TYPE MASTERSLICE ;
END PDIFF

LAYER POLY
 TYPE MASTERSLICE ;
END POLY

LAYER C01
 TYPE CUT ;
END C01

<snipped out METAL1, C12, METAL2, C23, etc...>

LAYER LEV29
 TYPE OVERLAP ;
END LEV29

I think nanoroute just wants the first layer definition to be type MASTERSLICE. If I were you and I couldn't get feedback/confirmation immediately, I'd leave layer "overlap" as type OVERLAP and move a MASTERSLICE layer definition to before the OVERLAP layer definition. You should have at least one MASTERSLICE layer. Maybe POLY?