beginner_EDA
Full Member level 4
Hi,
I am using Xilinx kc705 board with VIVADO 15.2 for my project and project have several clocks. In report time summary "Total hold slack" doesn't meet the timing requirement. Therefore by means of "contraints wizard" I am trying to enter several constraints parameter.
For input there are clocks having colck period 37 ns, 10 ns, 15 ns .... and I am supposed to provide the value for following input delays parameters:
Similarly for output there are clocks having clock period 37 ns, 6 ns, 10 ns, 7 ns, ... and I am supposed to provide the value for following output delays parameters:
But I don't know which value should I provide to these parameters. Where i can find such values?
Could anybody please help according to this?
Best regards
I am using Xilinx kc705 board with VIVADO 15.2 for my project and project have several clocks. In report time summary "Total hold slack" doesn't meet the timing requirement. Therefore by means of "contraints wizard" I am trying to enter several constraints parameter.
For input there are clocks having colck period 37 ns, 10 ns, 15 ns .... and I am supposed to provide the value for following input delays parameters:
Code:
tco_min, tco_max, trce_dly_min, trce_dly_max, trco_min, trco_max, tfco_min, tfco_max, trce_dly_min, trce_dly_max
Similarly for output there are clocks having clock period 37 ns, 6 ns, 10 ns, 7 ns, ... and I am supposed to provide the value for following output delays parameters:
Code:
tsu, thd, trce_dly_max, trce_dly_min
Could anybody please help according to this?
Best regards