fareen
Full Member level 3
how to write a testbench for udp02467???
i wrote a program whose compiling is just fine but its giving error when simulating
program is given below
// test bench for UDP 02467
module assi;
reg A,B,C;
wire x;
user_define_primitive udp(A,B,C,x);
initial
begin
A=1'b0;B=1'b0;C=1'b0;
#100
A=1'b0;B=1'b0;C=1'b1;
#100
A=1'b0;B=1'b1;C=1'b0;
#100
A=1'b0;B=1'b1;C=1'b1;
#100
A=1'b1;B=1'b0;C=1'b0;
#100
A=1'b1;B=1'b0;C=1'b1;
#100
A=1'b1;B=1'b1;C=1'b0;
#100
A=1'b1;B=1'b1;C=1'b1;
#100 $finish;
end
endmodule
//User defined primitive
primitive crctp (x,A,B,C);
output x;
input A,B,C;
//Truth table for x(A,B,C) = sum of (0,2,4,6,7)
table
// A B C : x
0 0 0 : 1;
0 0 1 : 0;
0 1 0 : 1;
0 1 1 : 0;
1 0 0 : 1;
1 0 1 : 0;
1 1 0 : 1;
1 1 1 : 1;
endtable
endprimitive
module declare_crctp;
reg x,y,z;
wire w;
crctp(w,x,y,z);
endmodule
the error its giving
Loading work.assi
# ** Error: (vsim-3033) D:/New Folder (2)/udp.v(5): Instantiation of 'user_define_primitive' failed. The design unit was not found.
# Region: /assi
# Searched libraries:
# work
# Error loading design
plz sumone help me
its urgent
assignment due today
i wrote a program whose compiling is just fine but its giving error when simulating
program is given below
// test bench for UDP 02467
module assi;
reg A,B,C;
wire x;
user_define_primitive udp(A,B,C,x);
initial
begin
A=1'b0;B=1'b0;C=1'b0;
#100
A=1'b0;B=1'b0;C=1'b1;
#100
A=1'b0;B=1'b1;C=1'b0;
#100
A=1'b0;B=1'b1;C=1'b1;
#100
A=1'b1;B=1'b0;C=1'b0;
#100
A=1'b1;B=1'b0;C=1'b1;
#100
A=1'b1;B=1'b1;C=1'b0;
#100
A=1'b1;B=1'b1;C=1'b1;
#100 $finish;
end
endmodule
//User defined primitive
primitive crctp (x,A,B,C);
output x;
input A,B,C;
//Truth table for x(A,B,C) = sum of (0,2,4,6,7)
table
// A B C : x
0 0 0 : 1;
0 0 1 : 0;
0 1 0 : 1;
0 1 1 : 0;
1 0 0 : 1;
1 0 1 : 0;
1 1 0 : 1;
1 1 1 : 1;
endtable
endprimitive
module declare_crctp;
reg x,y,z;
wire w;
crctp(w,x,y,z);
endmodule
the error its giving
Loading work.assi
# ** Error: (vsim-3033) D:/New Folder (2)/udp.v(5): Instantiation of 'user_define_primitive' failed. The design unit was not found.
# Region: /assi
# Searched libraries:
# work
# Error loading design
plz sumone help me
its urgent
assignment due today