Minimum insertion delay in CTS

[saikasyap]

At CTS stage we have to give the maximum skew and minimum insertion delay as constraints. After clock_opt if the design does not have min insertion delay the tool tries to add delay line to the clock tree. My question is why we have to maintain that minimum insertion delay as a constraint?


thanks in advance.

 

[pavanks]

In CTS we try to have minimum skew and minimum insertion delay.

As i know if skew is decreasing then ur insertion delay will increase.
So we try to balance both so that we have a acceptable skew and insertion delay.