Measure Leakage Current in MOS in a Lab

[dsk635]

Hi,

I have a really basic question.

I have an NMOS transistor whose Id-Vgs curve I have obtained by biasing VDS=0.1 V and sweeping VGS from -0.5 v to 2 V. The threshold voltage is around 1.1 V (its a 5V technology). I need to obtain Ileak from this data. Usually Ileak is equal to Ids measured @ Vgs = 0 (or MOS is OFF) - But when exactly do you say that the MOS is OFF?? (In general terms, off state is when Vgs < Vt) The Ids-Vgs curve obtained is pretty noisy at Vgs=0. So I doubt if it will give me an accurate value of Ileak. So the question is at what value of Vgs is Ids-Ileak?

Any help is appreciated.

Thanks,
-D.

 

[scottieman]

Hi,

I have a really basic question.

I have an NMOS transistor whose Id-Vgs curve I have obtained by biasing VDS=0.1 V and sweeping VGS from -0.5 v to 2 V. The threshold voltage is around 1.1 V (its a 5V technology). I need to obtain Ileak from this data. Usually Ileak is equal to Ids measured @ Vgs = 0 (or MOS is OFF) - But when exactly do you say that the MOS is OFF?? (In general terms, off state is when Vgs < Vt) The Ids-Vgs curve obtained is pretty noisy at Vgs=0. So I doubt if it will give me an accurate value of Ileak. So the question is at what value of Vgs is Ids-Ileak?

Any help is appreciated.

Thanks,
-D.

As you mentioned before, normally we define the leakage current of a NMOS at Vgs=0 with a specified Vds (e.g. 50mV and Vdd of your process)

The noisy stuff in Ileak region is mainly due to the noise in your measurement environement. Remember, the Ileak is in the order of pA or even fA, which is easily affected by any noise source around us.

To minimize (remember, it is minimized not eliminated) those noise, you can do better ground shelding around your measured wafer or device, and you can use more number of smaples or use middle/long options in your measurement machine.

Hope this help
Scottie