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MAC implementation in FPGA

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royvincent

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Hi,

I am trying implement a new multiplier accumulator unit (MAC) architecture in FPGA. Its quiet fast. But I need an application which utilizes this MAC. I need to compare its performance with the usual MAC architecture. Give me some application which will push the MAC to its limits.




Thanks
 

royvincent,

How about an FFT - IFFT. This is used in communications and is one of the slow points in a modem chain.

Sckoarn
 

ya thought of it.

continue informing other applications too...
 

If you want to 'push it to the limit', write the test case by yourself. Real applications don't push it to the limit as far as test programs do.
 

A FIR filter needs a lot of MAC operations.
 

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