LVS question for the inverter without source connection

[littlej_zju]

For below test case (inverter), the source of PMOS/NMOS don’t connect to power/ground through metal1, just by pickup.
But, from lvs check, source side of PMOS/NMOS show AVDD/AVSS. It seems un-reasonable.
How can I check such case?

 

[erikl]

Just put metal1 pins AVDD resp. AVSS over the metal1 source connections; repeat extraction & LVS.

 

[littlej_zju]

Just put metal1 pins AVDD resp. AVSS over the metal1 source connections; repeat extraction & LVS.

erikl, can you explain more detailed? Why will lvs still extracted AVDD/AVSS in source side?

 

[erikl]

Why will lvs still extracted AVDD/AVSS in source side?

This is a misunderstanding, I think: the extract tool doesn't assign any pin names, if they don't exist. Your schematic, however, owns these pin names, so the LVS can't succeed without assigning the corresponding pin names on the layout.

Either remove the AVDD/AVSS pins from the schematic, or add them to the layout, as suggested above.
You may use any pin names, but they should correspond on schematic and layout.