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i do nand3, with input name is ina,inb,inc, output name is out.i begin to study about layout so i have a lot of hardly.error is pin name input,isn't it ?
schematic is pass, DRC is pass,extract is pass but LVS isn't pass if you need my file i can upload for you
you can not assign pins arbitrarily. although when you swap pins the functionality remains, if the pins are not connected in layout the same way they are in schematic then lvs will not pass. this is common mistake i've seen in static logic layout.
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