LUT 6 INIT to implement a design

[lahrach]

Hi All,

I have searched long enough now with no luck, this should be trivial
for someone:

In the LUT4 instantiation below, what value should the LUT4 be
INITialized to in order to implement a 2-input MUX, with the inputs on
I0 and I1?

i_lut4 : LUT4 generic map( INIT => x"????")
port map(I0 => input1, I1 => input2, I2 => select, I3 => '0',
O => output);

Can someone please point me to a reference on how to calculate any INIT
value for any 4-input logic function in general.

Cheers,
Farid,

 

[svhb]

Strange, the title speaks about LUT6, but you want LUT4.

I did long time ago, as far as I remember, the value is just the 16 bit result, read bottom to top after writing all 16 possibilities down for the 4 outputs:

I3 I2 I1 I0 Out
0 0 0 0 1
0 0 0 1 1
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
...
1 1 1 0 1
1 1 1 1 1

Init = 11...01011 binary = ..B hex

(just some arbitrary output here, please fill in your own desired logic)

Stefaan

 

[permute]

its easy:
as an example of a LUT2 (xor gate example)
b3: i0 = 1, i1 = 1, O = 0
b2: i0 = 0, i1 = 1, O = 1
b1: i0 = 1, i1 = 0, O = 1
b0: i0 = 0, i1 = 0, O = 0
INIT = b3&b2&b1&b0 = "0110"

in anycase, I strongly suggest you write good HDL instead of manually using primitives. Why do you think you need to instantiate LUTs?

 

[mrflibble]

Hi All,

I have searched long enough now with no luck, this should be trivial
for someone:

I am experiencing deja vu.