Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Low SNR at high frequencies

Status
Not open for further replies.

Chinmaye

Full Member level 3
Joined
Jan 18, 2016
Messages
164
Helped
0
Reputation
0
Reaction score
1
Trophy points
1,298
Activity points
3,145
Dear all,
I am trying to simulate .noise in cadence for a flip-around sample and hold circuit. The sampling frequency is 4MHz. I have connected the inputs to common mode. The freq range is from 1 to 2MHz. I see peaking in the noise response at 165KHz. I think I am missing out on something.
Is there anything that I am missing out on?
 

Dear All,
In a switched capacitor amplifier, it is seen that the SNR degrades as the input frequency increases close to fs/2 where fs is the sampling frequency. Why?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top