zahrein
Full Member level 2
intel penang
HI,
Those who are interested. Please forward your resume to me at zahrein@gmail.com
System Marginality Validation – 561494
Responsibilities and Details
Description
System Marginality Validation (SMV) group is responsible for post silicon identification of processors and chipsets I/O circuit and interconnect flaws and ultimately provides PRQ recommendations for the electrical interfaces of processors and chipsets products in desktop/mobile market segment. In this position, you will be responsible for generation of test plans, strategies and also the coordination of test plan execution on leading edge PC platforms. In some cases, you will specify hardware or software requirements for project execution by working along with software and design engineers. In the long run, you will participate in defining next generation PC platform architecture with respect to debug hooks required for validation testing. Technologies supported are processor Front Side Bus, Memory, Inter-component interfaces like DMI, and I/O interfaces such SATA, USB and PCI-Express.
Qualifications
You should possess a Bachelor or a Master of Science degree in Electronic and Electrical Engineering, Computer, Telecommunication Engineering or equivalent. Additional qualifications include:
- Knowledgeable in PC platform architecture, processors/chipsets bus interfaces, and possesses good techniques and debugging skills to troubleshoot, from PC motherboards to component level
- Familiarity with standard lab instruments such as Digital and Analog oscilloscopes, Logic Analyzers, Function Generators, Digital Multi-meter and and others
- High speed digital and analog design knowledge and validation experience would be an added advantage
HI,
Those who are interested. Please forward your resume to me at zahrein@gmail.com
System Marginality Validation – 561494
Responsibilities and Details
Description
System Marginality Validation (SMV) group is responsible for post silicon identification of processors and chipsets I/O circuit and interconnect flaws and ultimately provides PRQ recommendations for the electrical interfaces of processors and chipsets products in desktop/mobile market segment. In this position, you will be responsible for generation of test plans, strategies and also the coordination of test plan execution on leading edge PC platforms. In some cases, you will specify hardware or software requirements for project execution by working along with software and design engineers. In the long run, you will participate in defining next generation PC platform architecture with respect to debug hooks required for validation testing. Technologies supported are processor Front Side Bus, Memory, Inter-component interfaces like DMI, and I/O interfaces such SATA, USB and PCI-Express.
Qualifications
You should possess a Bachelor or a Master of Science degree in Electronic and Electrical Engineering, Computer, Telecommunication Engineering or equivalent. Additional qualifications include:
- Knowledgeable in PC platform architecture, processors/chipsets bus interfaces, and possesses good techniques and debugging skills to troubleshoot, from PC motherboards to component level
- Familiarity with standard lab instruments such as Digital and Analog oscilloscopes, Logic Analyzers, Function Generators, Digital Multi-meter and and others
- High speed digital and analog design knowledge and validation experience would be an added advantage
