mmmmec
Newbie level 3
Hi,
I am planning to implement a router mesh network inside the FPGA with bidirectional buses. Unfortunately , it seems that tristating logic is not available for internal signals.
Could anyone kindly suggest any ideas by which an internal bidirectional bus can be implemented ?
I read somewhere about the compiler automatically converting the logic to MUX based . Could any one explain it in a more better way or point to some resources ?
Thanks and Regards
[/b]
I am planning to implement a router mesh network inside the FPGA with bidirectional buses. Unfortunately , it seems that tristating logic is not available for internal signals.
Could anyone kindly suggest any ideas by which an internal bidirectional bus can be implemented ?
I read somewhere about the compiler automatically converting the logic to MUX based . Could any one explain it in a more better way or point to some resources ?
Thanks and Regards
[/b]