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Input Return Loss (S11) of active Filter is positive (??!!)

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diyanasri

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Hi,

I am doing a CMOS Active filter circuit using Cadence Virtuoso with 50 Ohms ports at the input and output. After the simulation the results of the filter S21 is good and as expected (high gain, high Q), but the input return loss S11 shows a positive value.

I was expecting a negative S11 value... does this has something to do with the simulator itself? I tried to improve the matching on the input side and it seems that the higher the S11 value the better the gain of S21.

Below is the simulated result..
S_PARAM.png

Hoping somebody could help to explain why this is so?
 

Very likely due to feedback your input impedance has a negative real part (as is used to create oscillators). This results in |S11|>1. This may lead to parasitic oscillations depending on the source impedance as seen from the input of your filter.

When driving from 50 Ohms (as is the case when doing S parameters), the circuit may be stable. In a real world you may need a buffer stage to make sure the Q-factor and center frequency doesn't change with source impedance. If Q-factor goes to infinity (or beyond), you have an oscillator.
 
Last edited:

WimRFP,

Thanks for the reply, I'll try to look T the transient results to see if there's any oscillation. And like you suggested, I'll add an inout buffer to the circuit.
 

Do we need set DC voltage for input port when analysing S-paramter?
 

Do we need set DC voltage for input port when analysing S-paramter?

Ofcourse,your circuit must be properly biased in order to work!
 

If your circuit has bias of its own (so in and output are AC coupled), you don't need to use the VNA's bias feature. However if the bias depends on some external circuitry, or you just want to characterize an active component, you can use the VNA's bias function. Is saves you from inserting your own bias circuitry.
 

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