Junus2012
Advanced Member level 5
Dear friends,
I have simulated the ICMR of my fully differential amplifier by using the STB analyses with the help of diffstbprobe, I swept the input common mode voltage from rail to rail and looking to the output gain and GBW.
I am using PMOS and NMOS stage to have rail to rail ICMR,
it is supposed by theory, that there is region where either PMOS or the NMOS stage will be off so the gain as well as the GBW will change by factor of two, this is the reason why people use the constant gm technique in their design to make it constant as much as possible,
However, in my design I didn't use any gm constant technique and still have almost constant gain or GBW overall the range as you kindly can see from the simulated result below... do you think it is possible ?
Thank you in advance
I have simulated the ICMR of my fully differential amplifier by using the STB analyses with the help of diffstbprobe, I swept the input common mode voltage from rail to rail and looking to the output gain and GBW.
I am using PMOS and NMOS stage to have rail to rail ICMR,
it is supposed by theory, that there is region where either PMOS or the NMOS stage will be off so the gain as well as the GBW will change by factor of two, this is the reason why people use the constant gm technique in their design to make it constant as much as possible,
However, in my design I didn't use any gm constant technique and still have almost constant gain or GBW overall the range as you kindly can see from the simulated result below... do you think it is possible ?
Thank you in advance