How to use Verilog to describe a Vsource in IC5.0?

[copoler]

how can I use verilog to discribe a Vsource in IC5.0?
Thank u!

 

[visualart]

use verilog in IC5.0

you may use the vi , the textedit or the other editor edit your verilog source.

 

[copoler]

Re: use verilog in IC5.0

I don't know what envirment i should use,if it's analog artist,how can i add a instance described by verilog?

 

[Fom]

Re: use verilog in IC5.0

You cad add symbol of cell that should have behavioral or functional view. Usually it is just veilog code in text format.
But anyway you cannot simulate it without LDV package. IC package doesn't include Verilog simulator

 

[copoler]

Re: use verilog in IC5.0

The situation is that there is LDV installed,but what should i do to use it in IC?
And if i create a cell view of verilog code,which 'view name' and 'tool' should be chosen?Thank u!