How to solve gm variation problem?

[jcpu]

Dear Sir:

I am reviewing a 4MHz PLL with 6 stages ring of Gm-C cells.
The problems is gm value of these cells varies with process;
and even worse when temperature changes.

What should I do?

 

[paulux]

Re: gm variation problem

use temperature & process compensated circuit in your gm-cell circuit.

 

[jcpu]

Re: gm variation problem

Dear Paulux

Please suggest some reference paper or circuits?

Thanks in advance!

 

[eecs4ever]

Re: gm variation problem

**broken link removed**

slide 17.

There is more stuff about it in the grey and meyer textbook.

heres a paper that describes this.



Good luck!

 

[maddy]

Re: gm variation problem

Cant we use a constant-gm bias to bias the gm cells? I have seen it maintain constant-gm when I used it in a LNA. Just wondering... Let me know if this is wrong.

Maddy

 

[jcpu]

Re: gm variation problem

Dear Maddy

In the case of PLL, GM bias circuit are mainly controlled by output voltage
of loop filter which we called "Vtune".
With differnent Vtune, the GM bias should control the GM cell bias current
so as to reduce PFD (phase frequency detector) error.

I have no idea how to compensate (vs temperature or process) practically.
So I posted the question.
Thanks a lot for your suggestion.