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how to represent negative numbers without using two's compliment method in verilog?
what will be the putput for this..-4'd8 / 4'd2..will i get -6 in modelsim simulator..how to check or verify the answer.
what will be the putput for this..-4'd8 / 4'd2..will i get -6 in modelsim simulator..how to check or verify the answer.