How to replace designware cells in the netlist

[kshitij_s81]

designware cells

If the design does not meet constraints how can we change the designware cells in the netlist obtained from DC

 

[seanwu]

Try another solution. Design a module better than DW is not easy.

 

[zyphor]

you can optimize your algorithm from architecture level and make DC synthesis it easily .

 

[eda_wiz]

If the design does not meet constraints how can we change the designware cells in the netlist obtained from DC

DW block architecture is selected by DC based on your constraints. If ur timing is not met with DW you may need to design the reqd component by your own.

 

[kshitij_s81]

Hi friends
The problem faced by me is like this
My design is meeting the timing when i run synthesis from DC . It does not show me -ve slack
But when I do Static Timing Analysis by PT its showing me -ve slack.
So somebody suggested me to change the DW components to a faster one but i dont know whether its feasible or not.
Now I am not able figure the problem because DC is not showing slack but PT is showing.
Please Help me out
Waiting for your reply
Kshitij Sukhwal

 

[ivlsi]

DC is not showing slack but PT is showingl

very strange... do you run PT on pre- or post- layout netlist?

 

[englishdogg]

Can you post the reports of the two as well....

Also what kind of DW is it a mult, div, adder etc.. according to design does it fall on critical path
Can you check the speed grade and architecture selection by DC using report datapath commands