How to obtain constant Gm circuits?

[deepa]

how to obtain constant Gm circuits.can anyone analyse such a circuit and post it here.

 

[wpchan05]

constant-gm

how to obtain constant Gm circuits.can anyone analyse such a circuit and post it here.

Most of them are really obatined by linearizing the differential input transistors. Eg, in triode region based transconductor design, the Id is linear to Vgs (in first approximation), with Vds for tunability. A fully differential operation can reduce even order harmonic, leaving the 3rd order harmonic as the most important to determine linearity.

 

[deepa]

why constant gm

below are 2 circuits which are used as fixed bias Gm circuits,Can anyone tell me the difference between the both,,does both work fine or is one superior than the other

 

[hung_wai_ming@hotmail.com]

const gm

To my understandings, looks like only (a) works.
Although both figures come out to be Vgs1=Vgs2 + IR.

In (a), Suppose left branch I suddenly increases, it is a negative feedback that the Vgs of right branch will increase and finally the source node of left upper pMOS increase and finally the gate node of pMOS decreases which stabilizes the circuit.

In (b), Suppose right branch I suddenly increases, the gate of left nMOS increase, which decreases the source node of left pMOS, and further increase I in right branch, this is a positve feedback.

 

[jinnose]

constant gm

To my understandings, looks like only (a) works.
Although both figures come out to be Vgs1=Vgs2 + IR.

In (a), Suppose left branch I suddenly increases, it is a negative feedback that the Vgs of right branch will increase and finally the source node of left upper pMOS increase and finally the gate node of pMOS decreases which stabilizes the circuit.

In (b), Suppose right branch I suddenly increases, the gate of left nMOS increase, which decreases the source node of left pMOS, and further increase I in right branch, this is a positve feedback.

I don't understand how source of pMOS can be decreased or increased? This node is tied to ideal VDD.

 

[hung_wai_ming@hotmail.com]

feedback in const gm circuit

My apology, drain node. Typo

 

[nxing]

costant gm

only ((a) works, actually, it's a positive feedback with the gain less then one because of the source degenaration.

 

[jinnose]

gm constant

only ((a) works, actually, it's a positive feedback with the gain less then one because of the source degenaration.

nxing, I agree with you about feedback polarity. But, I don't quite understand how this can be stable.

would you please explain how (a) works even with positive feedback?

 

[pfd001]

small signal analysis of constant gm circuit

It is sure that only a can work

 

[122013137]

beta multiplier positive feedback

Some more basical books for reading

 

[deepa]

constant gm explained

Both the circuits have positive feedback,the difference is that one has a loop gain of more than 1 and another has a loopgain of less than 1.since a circuit will be stable even if it is in positive feedback if its gain is less than 1.

 

[hylas]

gm-constant

If current loopgain is considered, circuit (a) leads to positive loopgain that <1 which is stable in theory.

If you are not comfortable with positive feedback loop, you can try to study these circuits in another way by breaking the diode connection at Mb4 in (a) or Mb3 in (b), ie study the voltage loopgain vo/vi (please refer to the attached fig.). You will get -ve loopgain for (a) and +ve for (b).

 

[deepa]

site:www.edaboard.com constant gm

can you explain that in a little detail,,how do u get negative loop gain.and how can u break the diode connection,is tat right?

 

[xshou]

constant gm bias circuit

Some comments on positive feedback:

There is simply no need to be afraid of positive feedback.

Actually it's is very common in ckt design:

Widlar uses it in one of his earliest OPAMPs to boost gain; latch(static memory) ckts are all positive feedback; most bandgap bias ckts are of positive feedbacks (the ones above).

Now comes the catch: 'stability'. It's not in the sense of local stability as seen in the small signal analysis. Rather it's a large signal stability issue. If the disturbance is too strong, the ckt might not return to its original op pt. Memory ckts have 2 stable op pt, which depends on how you drive it. Band gap ckts often have start-up ckt to avoid latching into undesired op pt (latch-up state).

But fundamenally why? Becase positive feedback implies multiple operating points(thank to Nielson and Willson, for multiple op pt ckts, there must be a latch structure).

Some op pts are stable -- if positive gain smaller than one (rigorously it's not quite accurate, e.g. how to define gain for multiple loop system), it's stable (it's always stable no matter what L/C are used in the ckt--it's called D-stable in control; physically it's straightforward); if positive gain >1, the ckt is impossible be stablized by L/C or other dynamic components (it's called D-unstable in control).

Added after 9 minutes:

Some comments on constant Gm ckt:

Let's define 'constant' here. Is it in terms of temp? or supply? or process variation? or as one pointed, in terms of signal distortion (which I won't call it a constant Gm problem)?

In you don't care about the absolute accuracy, a good bandgap based bias can normally generate a constant gm to be within 5~10% error over process/temp/supply. To lower that, you can:
a. trim
b. design some control ckts (e.g. PLL/DLL based master/slave structure, which are widely used in Gm-C filter on-chip tuning).

 

[HenNavarre]

constant gm circuit

a) is the preferred circuit. Jacob Baker refers to it as the Beta Multiplier for biasing. you should check out cmos.edu for more info