Reshma Angelin
Newbie level 1
Hi
Can someone please guide me in interfacing the EMIF and the FPGA? What are the things that I have to consider to configure the Emif to read from and write to the FPGA? Also how is a read request generated?
Can someone please guide me in interfacing the EMIF and the FPGA? What are the things that I have to consider to configure the Emif to read from and write to the FPGA? Also how is a read request generated?