How to improve the supply independence in ring oscillator?

[ccw27]

maneatis

I am working on a buffer design based on Maneatis papers. The circuit and bias is shown below. I am trying to make the frequency more independent of Vdd change. The bias ckt is supposed to adjust the NMOS current source to counteract supply change but as I change my Vdd, the frequency changes a lot. Can anyone suggest ways to improve the supply independence?

Thanks

 

[simonkuo]

Re: Ring Oscillator

That is the replica construction, what is your VCO gain and low pass filter voltage range, and what is your process?
If your power supply is enough, try to add the regulator circuit above your VCO vdd.

 

[ccw27]

Re: Ring Oscillator

I am just designing the VCO. As I change Vdd from 2.8 to 2.52 the frequency changes around 40 MHz. I am trying to meet the spec of Δf/ΔVdd < 1% for oscillating frequency of 250 MHz. And I am using TSMC 0.18 process.

Thanks

 

[aicer]

Ring Oscillator

The bandwidth of the bias generator is typically set equally to the operating frequency of the buffer stages so that the bias generator can track all supply and substrate voltage disturbances.(quoted from the paper)

 

[ccw27]

Re: Ring Oscillator

Thanks aicer. Actually I am not sure of the meaning bandwidth in the bias generator, is it the closed loop response of the amplifier with replica? Can you elaborate more on that? Also how much variation in Vdd should I design up to?

Thanks

 

[jswei303]

Re: Ring Oscillator

As my experience, the regulator might help to reduce the vdd violation effect.
But how about the process violations and temp drift?
they're also problems to osc design.

Added after 23 minutes:

As my experience, the regulator might help to reduce the vdd violation effect.
But how about the process violations and temp drift?
they're also problems to osc design.

 

[ccw27]

Re: Ring Oscillator

For 1% Vdd variation Δf/ΔVdd < 1%, but for 10% Vdd variation then it seems hard to meet the spec. How much variation should I aim for?

Thanks