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How to implent an histogram in a FPGA device??

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Start to figure out how to display image using FPGA,
start looking in to embedded CPUs
NIOS, MICRO BLAZE
get mathlab with simulink,
and use search on the forum to find books on your topics

good lack
 

hi,

At this time i'm working on a circuit design which use an histogram!

I work with Xilinx devices and for the histogram i use block ram, that can take several configurations 512X32,1K x16, ...this is very important for differents data width.

Regards,
 

I'm using Altera tools, I need speed and I want to do via hardware implementation not using NIOSII.

I've been using DSPBuilder from Simulink, but there isn't any block to do directly an histogram.

I would like to get any reference design such us ram implementation in order to migrate it to DSPBuilder.

The images to compute are 320 x 240 x 16 bit and I have to know the maximun value of an histogram.
 

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