sevid
Member level 2
hi,everyone
my Q is how to get the max freqency of ur design from the synthesis results of DC ?
from the "data arrival time" ?
but i find that there are different "data arrival time"s when different clock cycles are set in ur tcl scripts, and all of these different clock cycles may meet the timing constaints from the timing report of DC.
but they have different "data arrival time"s, and i dont know which one to be selected as my max frequency. The one that equals to the "data required time" ?
what can i do then ?
plz
thanks
sevid
my Q is how to get the max freqency of ur design from the synthesis results of DC ?
from the "data arrival time" ?
but i find that there are different "data arrival time"s when different clock cycles are set in ur tcl scripts, and all of these different clock cycles may meet the timing constaints from the timing report of DC.
but they have different "data arrival time"s, and i dont know which one to be selected as my max frequency. The one that equals to the "data required time" ?
what can i do then ?
plz
thanks
sevid