how to generate 4phase clock

[gavin168]

Hi, guys,

How to generate 4phase clock. don't use PLL, DLL.

And how to generate a clock whose frequency is twice of input clock and duty cycle ia also 50%?

Thank you.

 

[AdvaRes]

Please elaborate.

 

[FvM]

Could be done with monoflops or logic gates with RC circuits or delay lines, but much less exactly than with PLL. Depend on your requirements, if the solution is appropriate. Regarding monoflop operation, you can consult respective datasheets from all major manufacturers.

 

[Old Nick]

you can use multiple monostables to create edges where required and then more monostables to create the clocks from them.

But a PLL is a far better solution.