Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to do the area constraint using floorplanner?

Status
Not open for further replies.

pwq1999

Member level 2
Joined
Mar 2, 2008
Messages
42
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,578
i want to use floorplanner to constrain my design by using area group constraint, and i want to follow the signal flow to assign my module in different place, now the problem i am encounting is that i found the right edge of floor planner didn't have pin number(pin location information). i think in ASIC design, all four edge of fpga should have pin location.

In this situation, how i can do the area constraint by using floorplanner ?

thanks in advance!
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top